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AIAI Wranglers

30 Neural Architecture Search and Adaptive Networks

How Nature Builds Brains

A newborn human enters the world with approximately one hundred billion neurons, yet the wiring diagram connecting them is far from complete. In the first months and years of life, synaptic connections form at a staggering rate: roughly seven hundred to one thousand new synapses every second, a process so prodigious that by age two or three, the infant brain contains more synaptic connections than it will ever possess again. At peak density, the cerebral cortex alone harbours approximately one quadrillion (1015) synaptic junctions, a number so vast that if each synapse were a grain of sand, the resulting pile would fill several Olympic swimming pools.

Then something remarkable happens. The brain begins to prune. Connections that are reinforced by repeated experience grow stronger; those that languish without stimulation are systematically eliminated. Between the ages of two and sixteen, roughly half of all synapses are removed in a process that neuroscientists call synaptic pruning. The mature adult brain, far from being a static organ, is the carefully sculpted product of a two-phase process: first, a dramatic over-expansion of connectivity; then, a prolonged period of experience-driven refinement.

The detective's first question is immediate and pointed: why would evolution favour such a seemingly wasteful strategy? Why build a massively over-connected network only to dismantle half of it? And if nature's approach to building intelligence involves searching through a vast space of possible wiring diagrams and pruning towards an optimal one, does this tell us something fundamental about how we should design neural network architectures for artificial intelligence?

This chapter argues that the answer is yes. The biological brain's developmental programme is, in a precise mathematical sense, a neural architecture search algorithm, one that has been refined by hundreds of millions of years of evolutionary pressure. Understanding this biological algorithm will illuminate the principles behind modern computational approaches to architecture search, and will reveal deep connections between neuroscience, information theory, and the mathematics of optimisation.

We begin where all good detective stories begin: at the scene of creation itself.

From Baseline to Blueprint: Cortical Development

The construction of the human brain proceeds in phases that bear a striking resemblance to the stages of a well-designed engineering project. The genetic programme encoded in DNA provides what we might call the initial search space: a set of instructions that specify the broad architecture (how many neurons to produce, their general types, the rough layout of cortical regions) without dictating every last connection. This genetic blueprint is remarkably compact. The human genome contains approximately three billion base pairs, encoding roughly twenty thousand protein-coding genes, yet it must specify a brain with 1011 neurons and 1015 synapses. The genome cannot possibly encode each connection individually; instead, it specifies rules for generating and refining connectivity, much as a procedural graphics algorithm specifies rules for generating complex textures rather than storing each pixel.

Definition 1 (Neural Search Space).

The biological neural search space ๐’ฎbio is the set of all possible wiring configurations (graphs) that can arise from a given genetic programme ๐’ข. Formally, let ๐’ฑ denote a set of neurons and โ„ฐโІ๐’ฑร—๐’ฑ a set of directed synaptic connections with associated weights w:โ„ฐโ†’โ„โก. Then ๐’ฎbio(๐’ข)={(๐’ฑ,โ„ฐ,w)|(๐’ฑ,โ„ฐ,w)ย isย reachableย fromย ๐’ขย underย developmentalย rules}. The size of this space is astronomically large: with N=1011 neurons, the number of possible directed graphs is 2N2=21022, a number that dwarfs the number of atoms in the observable universe (โˆผ1080).

Prenatal development: building the hardware.

During the first trimester of gestation, neural progenitor cells in the embryonic neural tube divide at an extraordinary rate, producing roughly 250,000 new neurons per minute at peak neurogenesis [57]. These neurons then migrate along radial glial fibres to their designated positions in the developing cortex, a journey that can span several millimetres (an enormous distance at the cellular scale). The migration is guided by chemical gradients (chemoattractants and chemorepellents) that act as a coarse-grained positioning system. By the end of the second trimester, the vast majority of cortical neurons have reached their final positions, and the basic laminar structure of the six-layered neocortex is established.

At this stage, the brain resembles an enormous collection of components that have been placed on a circuit board but not yet soldered together. The neurons are present, but the synaptic connections between them are sparse. Axons have begun to extend towards their target regions, guided by molecular signalling pathways, but the fine-grained wiring remains to be determined.

Postnatal synaptogenesis: exploring the search space.

Birth triggers a dramatic acceleration of connectivity. Freed from the metabolically constrained intrauterine environment and exposed to the rich sensory world, the infant brain enters a phase of explosive synaptogenesis: the formation of new synaptic connections. In the visual cortex, synaptic density increases from approximately 2,500 synapses per neuron at birth to roughly 15,000 per neuron by age two, a six-fold increase driven primarily by experience [58].

This expansion is not random. Neurons that are activated by sensory input extend new dendritic spines (the postsynaptic structures that receive signals from other neurons) and form connections preferentially with neurons that are co-activated. The result is a rapid, experience-driven exploration of the connectivity space: the brain is โ€œtrying outโ€ many possible wiring configurations simultaneously, allowing the statistics of the sensory environment to guide which connections are formed.

Critical periods: windows of architectural plasticity.

Not all brain regions undergo synaptogenesis and pruning on the same schedule. Critical periods are developmental windows during which specific brain circuits exhibit heightened plasticity, the capacity for structural and functional reorganisation. The critical period for binocular vision, for example, peaks between ages one and five; during this window, abnormal visual input (such as a misaligned eye) can cause permanent rewiring of the visual cortex. The critical period for native language acquisition extends roughly from birth to age seven [59], after which acquiring native-level phonological distinctions becomes dramatically more difficult.

Recent longitudinal neuroimaging studies have revealed that brain development continues far longer than the traditional view suggested. While early textbooks placed the end of major brain development at approximately age twenty-five, large-scale studies tracking thousands of individuals have shown that significant structural remodelling continues through the early thirties [60]. The period from approximately age nine to age thirty-two is characterised by continuous rewiring: cortical thickness decreases (reflecting ongoing pruning), white matter integrity increases (reflecting myelination of frequently used pathways), and the balance between excitatory and inhibitory neurotransmission gradually shifts towards greater inhibitory control. After approximately age thirty-two, the brain shifts from active restructuring to consolidation, locking in the pathways that have been most frequently and successfully used.

Timeline of brain development from birth to age 35. Synaptogenesis (blue) peaks around ages 2โ€“3, creating a maximally connected network. Pruning (red) intensifies during childhood and adolescence, removing roughly half of all synapses. Myelination (green) increases throughout adolescence and into the twenties, speeding signal transmission along retained pathways. Overall plasticity (dashed amber) declines with age but remains nonzero throughout life. Each phase has a direct analogy to stages in neural architecture search, annotated at the top of the figure.

Historical Note.

The story of how we came to understand the brain as a network of individual neurons is itself a remarkable detective story. In the late nineteenth century, the Italian physician Camillo Golgi developed a silver staining technique that made individual neurons visible under the microscope for the first time. The Spanish anatomist Santiago Ramรณn y Cajal used Golgi's own technique to argue, against Golgi's own belief, that the nervous system was composed of discrete cells (the โ€œneuron doctrineโ€) rather than a continuous reticulum [1]. Cajal's exquisite drawings of neural circuits, produced entirely by hand from microscope observations, remain among the most beautiful scientific illustrations ever created. Golgi and Cajal shared the 1906 Nobel Prize in Physiology or Medicine, despite holding diametrically opposed views about the very nature of the nervous system.

Half a century later, the Canadian psychologist Donald Hebb proposed a learning rule that would become the foundation of both neuroscience and artificial neural networks: โ€œWhen an axon of cell A is near enough to excite a cell B and repeatedly or persistently takes part in firing it, some growth process or metabolic change takes place in one or both cells such that A's efficiency, as one of the cells firing B, is increasedโ€ [2]. This principle, often summarised as โ€œcells that fire together wire together,โ€ provided the first mechanistic account of how experience could modify brain structure. Hebb's rule is, in essence, a local architecture search algorithm: connections that participate in successful computations are strengthened, while those that do not are weakened and eventually pruned.

Synaptic Pruning: Nature's Architecture Search

The over-connected infant brain faces a fundamental problem: it has too many parameters. With approximately 1015 synapses, the network is massively over-parameterised relative to the structure of the sensory world it must model. The solution that evolution has converged upon is elegant and, as we shall see, deeply relevant to modern neural architecture search: the brain performs experience-dependent pruning, systematically eliminating connections that do not contribute to useful computation.

The mechanism is straightforward in principle. When a presynaptic neuron i fires and the postsynaptic neuron j is subsequently activated, the synapse connecting them is strengthened, a phenomenon called long-term potentiation (LTP). Conversely, when the firing of neuron i consistently fails to contribute to the activation of neuron j, the synapse is weakened through long-term depression (LTD) and may eventually be eliminated entirely. The result is a use-it-or-lose-it dynamic in which the statistics of the environment sculpt the network's architecture.

Definition 2 (Hebbian Learning Rule).

Let xi(t) denote the activation of neuron i at time t, and let wij denote the synaptic weight from neuron i to neuron j. The Hebbian learning rule updates the weight according to (HEBB RULE)ฮ”wij=ฮทโ‹…xi(t)โ‹…xj(t), where ฮท>0 is the learning rate. When both neurons are simultaneously active (xi>0 and xj>0), the weight increases; when either is silent, the weight remains unchanged. In the continuous-time limit, this becomes (HEBB Continuous)dwijdt=ฮทxi(t)xj(t)โˆ’ฮปwij(t), where the decay term โˆ’ฮปwij prevents unbounded weight growth and implements a form of synaptic homeostasis.

The Hebbian rule in (HEBB RULE) has a well-known instability: weights can grow without bound when neurons are persistently co-activated. The biological brain addresses this through several homeostatic mechanisms, including synaptic scaling (a global multiplicative normalisation of all synapses on a given neuron) and metaplasticity (the plasticity threshold itself shifts depending on recent activity). These mechanisms ensure that the total synaptic drive to each neuron remains within a functional range, preventing runaway excitation.

Proposition 1 (Hebbian Pruning Dynamics).

Consider a network of N neurons with weight matrix ๐–โˆˆโ„Nร—Nโก evolving under the regularised Hebbian rule in (HEBB Continuous). Let ๐‚=๐”ผ[๐’™(t)๐’™(t)โŠค] denote the input correlation matrix, assumed to be positive semidefinite with eigenvalues ฯƒ1โ‰ฅฯƒ2โ‰ฅโ‹ฏโ‰ฅฯƒNโ‰ฅ0. Then the equilibrium weight matrix satisfies ๐–โˆ—=ฮทฮป๐‚, and synapses corresponding to weakly correlated neuron pairs (small entries of ๐‚) converge to near-zero weights and are candidates for pruning. Specifically, a synapse wijโˆ— satisfies |wijโˆ—|<ฯ„ for pruning threshold ฯ„>0 whenever |๐”ผ[xi(t)xj(t)]|<ฮปฯ„ฮท.

Proof.

At equilibrium, dwij/dt=0, so from (HEBB Continuous), 0=ฮท๐”ผ[xi(t)xj(t)]โˆ’ฮปwijโˆ—. Solving for wijโˆ— gives wijโˆ—=(ฮท/ฮป)๐”ผ[xi(t)xj(t)]=(ฮท/ฮป)Cij. In matrix form, ๐–โˆ—=(ฮท/ฮป)๐‚. The pruning condition follows directly: |wijโˆ—|<ฯ„ if and only if (ฮท/ฮป)|Cij|<ฯ„, which gives |Cij|<ฮปฯ„/ฮท.

Proposition 1 reveals a deep principle: Hebbian learning, combined with weight decay, naturally identifies synapses that carry little statistical information about the correlational structure of the environment. These are precisely the synapses that the brain prunes. The pruning threshold ฯ„ plays the role of a significance level: only connections whose correlation exceeds a minimum strength survive.

The pruning timeline.

Synaptic pruning is not a single event but a protracted process that unfolds over more than a decade. In the visual cortex, pruning begins around age one and reaches a plateau by puberty. In the prefrontal cortex, which governs executive function, planning, and impulse control, pruning continues into the mid-twenties and possibly beyond. The total reduction is substantial: approximately 50% of synapses are eliminated between peak density (age two to three) and adulthood [58].

This prolonged timeline is not a design flaw; it reflects the different timescales on which different brain regions must adapt to their inputs. The visual cortex, which processes relatively low-level features (edges, colours, motion), can converge on an efficient architecture quickly because the statistics of visual input are relatively stable. The prefrontal cortex, which must learn complex social rules, abstract reasoning strategies, and long-horizon planning, requires a longer search period because the relevant โ€œtraining dataโ€ arrives slowly over years of social and cognitive experience.

Definition 3 (Synaptic Plasticity Rate).

The synaptic plasticity rate ฮ (t) quantifies the capacity for structural change in a neural circuit as a function of developmental time t (measured in years from birth). We model it as a decaying exponential with a nonzero baseline: (Plasticity RATE)ฮ (t)=ฮ 0โ‹…expโก(โˆ’ฮปpt)+ฮ โˆž, where ฮ 0 is the peak plasticity at birth, ฮปp>0 is the plasticity decay rate, and ฮ โˆž>0 is the residual adult plasticity. Empirical estimates suggest ฮ 0โ‰ˆ0.9 (normalised units), ฮปpโ‰ˆ0.08yearโˆ’1, and ฮ โˆžโ‰ˆ0.05, indicating that even in adulthood, the brain retains approximately 5% of its peak capacity for structural reorganisation.

The plasticity rate ฮ (t) governs the effective โ€œlearning rateโ€ for architectural changes. During critical periods, ฮ (t) is high, and the network can rapidly rewire in response to experience. As ฮ (t) declines, architectural changes become slower and more incremental, eventually reaching the baseline level ฮ โˆž that supports lifelong learning at a reduced rate. This mirrors a common strategy in neural architecture search: begin with aggressive exploration (high architectural learning rate), then gradually reduce the rate of structural changes as the search converges, a form of simulated annealing applied to network topology.

Key Idea.

The brain does not design its architecture from a blank slate. Instead, it follows a two-phase strategy: (1) grow an over-parameterised network with far more connections than ultimately needed, then (2) prune away connections that are not reinforced by experience. This โ€œgrow then pruneโ€ strategy has a deep computational rationale: the initial over-expansion ensures that no potentially useful connection is missed, while the subsequent pruning removes the noise and converges to an efficient architecture matched to the environment. This is the biological analog of architecture pruning in neural architecture search, and it suggests that the NAS community's interest in pruning-based methods is not merely a computational convenience but a recapitulation of a strategy refined by hundreds of millions of years of evolution.

Two complementary strategies.

The brain's โ€œgrow then pruneโ€ approach is not the only possible strategy. An alternative is โ€œstart simple and growโ€: begin with a minimal architecture and progressively add capacity as needed. Both strategies exist in the NAS literature. Pruning-based approaches (such as network slimming and lottery ticket methods [61]) follow the biological model, starting with a large network and removing unnecessary components. Progressive growing approaches (such as Net2Net [62] and progressive growing of GANs [63]) follow the alternative model, starting small and adding capacity incrementally.

Which strategy is better? The answer depends on the prior knowledge available. When the target architecture is believed to be a subset of a known large architecture, pruning is efficient because the search space is implicitly defined by the parent network. When the target architecture may require novel structural motifs not present in any initial design, progressive growing is more flexible because it can explore regions of the search space that pruning alone cannot reach. The brain uses both: synaptogenesis (growing) and pruning (shrinking) occur simultaneously during development, with the balance shifting from growth-dominated to pruning-dominated as the organism matures.

Lifelong learning: growth or rewiring?

A natural question arises: do adult brains continue to grow new neurons, or do they primarily rewire existing connections? The answer, established through decades of research, is nuanced. Adult neurogenesis (the birth of new neurons) occurs in a few restricted brain regions, most notably the hippocampus (involved in memory formation) and the olfactory bulb (involved in smell processing) [64]. However, the rate of adult neurogenesis is low compared to developmental neurogenesis, and its functional significance remains debated.

The dominant mode of adult brain plasticity is rewiring: existing synapses are strengthened, weakened, or eliminated, and new synapses can form between existing neurons. This rewiring comes at a cost: strengthening one set of connections often entails weakening others, a phenomenon that manifests as forgetting. The brain manages this tradeoff through consolidation mechanisms (which we will explore in Sleep, Dreams, and Offline Consolidation) that protect important memories while allowing less critical ones to fade. The implication for artificial systems is significant: adaptive networks that modify their architecture during deployment must contend with the same stability-plasticity tradeoff that the brain faces.

What Limits Growth? Physical and Computational Constraints

The brain is not free to grow without bound. It operates under a stringent set of physical, metabolic, and computational constraints that fundamentally shape its architecture. Understanding these constraints illuminates why the brain looks the way it does, and, more importantly, provides a framework for understanding the analogous constraints that govern artificial neural network design.

Metabolic cost.

The human brain accounts for approximately 2% of body mass but consumes roughly 20% of the body's resting metabolic energy, a disproportionate share that reflects the extraordinary energy demands of neural computation [65]. Each neuron consumes energy to maintain its resting membrane potential, to propagate action potentials along its axon, and to release and recycle neurotransmitters at synaptic junctions. The energy cost per synaptic event has been estimated at approximately 104 ATP molecules, corresponding to roughly 10โˆ’12 joules (1 picojoule) per synaptic transmission. At a firing rate of 10 Hz and with 104 synapses per neuron, each active neuron consumes on the order of 10โˆ’7 W at peak. Because only a small fraction of the brain's 1011 neurons fire at any instant (sparse coding), the whole brain empirically consumes only about 20 W, far below the 104 W that a continuously firing population would demand.

Proposition 2 (Metabolic Bound on Network Size).

Let e denote the average power consumption per neuron (in watts), and let E denote the total energy budget available for neural computation (in watts). Then the maximum number of neurons N that can be sustained is bounded by (Metabolic Bound)Nโ‰คEe. For the human brain, eโ‰ˆ10โˆ’9 W (accounting for the fact that not all neurons fire at maximum rate simultaneously; the average power per neuron, including maintenance costs, is lower than the peak per-spike cost) and Eโ‰ˆ20 W, yielding Nโ‰ค2010โˆ’9=2ร—1010. This bound is consistent with the observed neuron count of approximately 1011 (the discrepancy reflects the fact that glial cells and other support structures share the energy budget).

Proof.

The proof follows directly from energy conservation. If each of N neurons consumes power e simultaneously, the total power consumption is Nโ‹…e. For the brain to operate within its energy budget, we require Nโ‹…eโ‰คE, which gives Nโ‰คE/e. The bound is tight when all neurons are active simultaneously, which occurs approximately during wakefulness when large-scale neural populations are engaged in coordinated processing. In practice, not all neurons fire simultaneously, so the effective bound is somewhat higher than E/e computed at peak per-neuron rates, but the order of magnitude is correct.

Cranial volume constraints.

The skull imposes a hard upper bound on brain volume. The average adult human cranial capacity is approximately 1,400 cm3, and this volume must accommodate not only neurons but also glial cells (which outnumber neurons by a factor of roughly one to one in humans), blood vessels (the brain receives approximately 15% of cardiac output), cerebrospinal fluid, and the meninges. The packing density of neurons in the cortex is approximately 105 neurons per mm3, and this density cannot be increased arbitrarily without compromising the space available for axons, dendrites, and supporting vasculature.

Wiring optimisation.

Axons, the long projections through which neurons transmit signals to distant targets, occupy physical space and consume metabolic resources proportional to their length. The brain's wiring problem is analogous to a VLSI circuit layout problem: given a set of functional units (cortical regions) and a set of required connections (white matter tracts), find an arrangement that minimises total wire length while satisfying all connectivity constraints [66]. This optimisation shapes the brain's physical layout: functionally related regions tend to be physically adjacent (minimising short-range wiring), while long-range connections (such as the corpus callosum connecting the two hemispheres) are reserved for communication that cannot be achieved through local circuits alone.

Proposition 3 (Wiring Length Minimisation).

Consider a network of N neurons with positions ๐’‘1,โ€ฆ,๐’‘Nโˆˆโ„3โก and a required connectivity pattern specified by an adjacency matrix ๐€โˆˆ{0,1}Nร—N. The total wiring length is (Wiring Length)L(๐’‘1,โ€ฆ,๐’‘N)=โˆ‘i=1Nโˆ‘j=1NAijโ€–๐’‘iโˆ’๐’‘jโ€–2. The optimal placement problem min๐’‘1,โ€ฆ,๐’‘NโกL(๐’‘1,โ€ฆ,๐’‘N) is NP-hard in general (by reduction from the quadratic assignment problem). However, spectral relaxation provides an approximate solution: the optimal positions are related to the leading eigenvectors of the graph Laplacian ๐‹=๐ƒโˆ’๐€, where ๐ƒ=diagโก(๐€1). Specifically, the eigenvectors ๐’–2,๐’–3,๐’–4 corresponding to the second through fourth smallest eigenvalues of ๐‹ provide a three-dimensional embedding that approximately minimises total wiring length.

Proof.

We sketch the proof. The wiring length objective involves โ„“2 norms, which makes the problem non-smooth. Replacing โ€–๐’‘iโˆ’๐’‘jโ€–2 with โ€–๐’‘iโˆ’๐’‘jโ€–22 (the squared Euclidean distance) gives a smooth relaxation. Let ๐โˆˆโ„Nร—3โก be the matrix whose i-th row is ๐’‘iโŠค. Then the squared wiring length can be written as L(2)(๐)=โˆ‘i,jAijโ€–๐’‘iโˆ’๐’‘jโ€–22=2trโก(๐โŠค๐‹๐). Minimising trโก(๐โŠค๐‹๐) subject to ๐โŠค๐=๐ˆ (to prevent the trivial solution ๐=0) is a Rayleigh quotient problem. By the Courant-Fischer theorem, the minimum is achieved when the columns of ๐ are the eigenvectors corresponding to the smallest eigenvalues of ๐‹. The smallest eigenvalue is always zero (with eigenvector 1/N, corresponding to a constant translation), so the nontrivial solution uses eigenvectors ๐’–2,๐’–3,๐’–4. The NP-hardness of the original (โ„“2) problem follows from the known NP-hardness of the quadratic assignment problem [3].

Insight.

Physical constraints in biology parallel compute, memory, and latency constraints in hardware-aware neural architecture search. The brain is, in a very real sense, the ultimate hardware-aware architecture: it has been optimised not only for computational performance but also for energy efficiency, physical compactness, and communication bandwidth. Every modern hardware-aware NAS algorithm that jointly optimises accuracy and latency is, perhaps unknowingly, following the same multi-objective optimisation strategy that evolution has employed for hundreds of millions of years.

Biological ConstraintNAS AnalogTypical Metric
Metabolic cost (โˆผ20 W)Computational costFLOPs, MACs
Cranial volume (โˆผ1400 cm3)Memory budgetGPU RAM (GB)
Axonal wiring lengthCommunication latencyInference latency (ms)
Synaptic density limitParameter count# Parameters
Heat dissipationThermal design powerTDP (watts)
Blood supply bandwidthMemory bandwidthGB/s
Neurotransmitter recycling rateBatch throughputSamples/second
Developmental timeTraining timeGPU-hours
Biological constraints and their analogs in neural architecture search. Each physical limitation of the brain has a direct counterpart in the computational constraints faced by artificial neural networks.

Exercise 1.

Energy efficiency of biological vs. artificial networks. The human brain performs approximately 1016 synaptic operations per second while consuming 20 W, yielding an energy efficiency of 5ร—1014 operations per watt. A modern GPU (such as the NVIDIA H100) performs approximately 1015 FLOPs while consuming 700 W, yielding approximately 1.4ร—1012 operations per watt. (a) Compute the ratio of biological to artificial energy efficiency. (b) If hardware energy efficiency improves at a rate of 2ร— every 2 years (a generous interpretation of Moore's law for energy), how many years until artificial hardware matches biological energy efficiency? (c) Discuss why this comparison is imprecise (hint: consider the difference between a synaptic operation and a floating-point operation).

Exercise 2.

Spectral neuron placement. Consider a network of N=8 neurons arranged in a ring graph (neuron i connected to neurons iโˆ’1 and i+1 modulo N). (a) Write down the adjacency matrix ๐€ and the graph Laplacian ๐‹. (b) Compute the eigenvalues and eigenvectors of ๐‹. (c) Using the second and third eigenvectors, embed the neurons in โ„2โก. Verify that the resulting layout places the neurons approximately on a circle, confirming that the spectral method recovers the natural ring geometry.

The Information-Theoretic Brain

If the brain is an architecture search algorithm, refined by evolution and fine-tuned by experience, then what are its fundamental limits? What determines the maximum amount of information a neural circuit can process, and how does this constrain the architectures that can emerge from the developmental search? To answer these questions, we turn to the language of information theory, the mathematical framework that Claude Shannon developed in 1948 to quantify the fundamental limits of communication [67].

The application of information theory to neuroscience is not merely an analogy. Neurons are, quite literally, communication channels: they receive input signals (via dendrites), perform a nonlinear computation (in the cell body), and transmit the result (via action potentials along the axon) to downstream neurons. The reliability, capacity, and efficiency of this neural communication system are governed by the same mathematical laws that govern telephone lines, fibre optic cables, and wireless networks. Understanding these laws will reveal why certain brain architectures are more efficient than others, and will provide principled bounds on the architectures that neural architecture search should target.

Channel Capacity of Biological Neurons

The neuron as a noisy channel.

A biological neuron receives input from hundreds to thousands of presynaptic neurons, integrates these signals, and produces an output in the form of a sequence of electrical impulses called action potentials or spikes. The spike is an all-or-nothing event: it either occurs or it does not, with a relatively stereotyped waveform. The information carried by a neuron is therefore encoded not in the shape of individual spikes (which is approximately constant) but in the timing and rate of spikes.

Two principal coding schemes have been identified in the neuroscience literature. In rate coding, the information is carried by the average firing rate over some time window ฮ”t: a higher rate indicates a stronger response. In temporal coding, the information is carried by the precise timing of individual spikes relative to some reference (such as the phase of an ongoing oscillation or the timing of spikes in other neurons). The distinction between these coding schemes has profound implications for neural channel capacity, as temporal coding can in principle carry far more information per spike than rate coding.

Definition 4 (Neural Channel Capacity).

Consider a single neuron as a discrete memoryless channel with input X (the input spike train from presynaptic neurons) and output Y (the output spike train). The neural channel capacity is (Neural Channel Capacity)Cneuron=maxp(x)โก๐–จโก(X;Y)=maxp(x)โก[๐–งโก(Y)โˆ’๐–งโก(Y|X)], where ๐–จโก(X;Y) is the mutual information between input and output, ๐–งโก(Y) is the entropy of the output, and ๐–งโก(Y|X) is the conditional entropy of the output given the input (the โ€œnoise entropyโ€). The maximum is taken over all possible input distributions p(x) consistent with the neuron's biophysical constraints (maximum firing rate, refractory period, energy budget).

Experimental measurements of neural channel capacity, performed by recording the responses of individual neurons to repeated presentations of the same stimulus, have yielded estimates in the range of 0.5 to 6 bits per spike, depending on the neuron type and the coding scheme employed [68]. Neurons in the fly visual system, which use precise temporal coding, achieve the upper end of this range (โˆผ5โ€“6 bits per spike). Cortical neurons in mammals, which tend to rely more heavily on rate coding, typically achieve lower information rates (โˆผ1โ€“2 bits per spike).

Example 1.

Channel capacity of a rate-coding neuron. Consider a neuron that encodes information via its firing rate r over a time window ฮ”t=100 ms. Suppose the neuron can fire at rates between rminโก=0 Hz and rmaxโก=200 Hz, and that the observed rate is corrupted by Gaussian noise with standard deviation ฯƒr=20 Hz. Under rate coding, the output is effectively a continuous variable Y=r+ฯต where ฯตโˆผNormalโก(0,ฯƒr2). The channel capacity for a Gaussian channel with input power constraint P and noise variance ฯƒr2 is C=12log2โก(1+Pฯƒr2). If we model the input as uniformly distributed over [0,rmaxโก], the signal variance is P=rmaxโก2/12โ‰ˆ3,333 Hz2, and the capacity is C=12log2โก(1+3333400)=12log2โก(9.33)โ‰ˆ1.6bitsย perย timeย window. Over the ฮ”t=100 ms window, this corresponds to an information rate of approximately 16 bits per second. With 104 rate-coding neurons operating in parallel, the aggregate information rate is 1.6ร—105 bits/s โ‰ˆ160 kbps.

Total information throughput of the brain.

With approximately 1011 neurons, each firing at an average rate of perhaps 1โ€“10 Hz and carrying 1โ€“6 bits per spike, the theoretical maximum information throughput of the human brain is enormous: on the order of 1011 to 1012 bits per second. However, the useful information rate, the rate at which the brain extracts and processes behaviourally relevant information from its sensory input, is vastly lower. Estimates of the conscious information processing rate range from 10 to 50 bits per second [69], while the visual cortex is estimated to process approximately 107 bits per second of visual information.

Remark 1.

The enormous gap between the brain's theoretical channel capacity (โˆผ1011โ€“1012 bits/s) and its useful information processing rate (โˆผ101โ€“107 bits/s) is not a sign of inefficiency but a reflection of massive redundancy and error correction. Much of the brain's neural activity is devoted to internal communication, homeostatic regulation, prediction, and noise suppression rather than to processing external information. This gap parallels the well-known observation in deep learning that the number of parameters in a neural network (its โ€œraw capacityโ€) vastly exceeds the effective number of parameters (its โ€œuseful capacityโ€) as measured by the information stored about the training set. In both biological and artificial systems, the gap between raw and effective capacity reflects the cost of robustness.

Connection to rate-distortion theory.

The brain's sensory processing can be viewed through the lens of rate-distortion theory, which characterises the minimum number of bits needed to represent a source signal at a given level of fidelity. The rate-distortion function R(D) gives the minimum mutual information between the source and its compressed representation that is achievable at distortion level D: (RATE Distortion)R(D)=minp(x^|x):๐”ผ[d(X,X^)]โ‰คDโก๐–จโก(X;X^), where d(x,x^) is a distortion measure. The visual cortex performs a form of lossy compression: it extracts the features of the visual scene that are most relevant for behaviour (object identity, spatial layout, motion) while discarding details that are less behaviourally relevant (exact pixel intensities, fine texture details). This compression is adaptive: the features that are preserved depend on the task at hand (recognising a face vs. navigating a cluttered room vs. tracking a moving prey).

Proposition 4 (Capacity-Distortion Tradeoff for Neural Representations).

Let X be a continuous sensory input with differential entropy h(X), and let T be a neural representation of X with at most C bits of capacity. Then the minimum achievable expected distortion under squared-error loss satisfies (Capacity Distortion)Dminโก(C)โ‰ฅ22[h(X)โˆ’C]โ‹…12ฯ€e, which is the Shannon lower bound. Equality holds when X is Gaussian. This bound implies that reducing distortion by a factor of 4 requires increasing the representation capacity by 1 bit (since Dโˆ2โˆ’2C).

Proof.

For a continuous source X with differential entropy h(X) and squared-error distortion d(x,x^)=(xโˆ’x^)2, the rate-distortion function satisfies R(D)โ‰ฅh(X)โˆ’12log2โก(2ฯ€eD) (the Shannon lower bound). Setting R(D)โ‰คC (the capacity constraint) and solving for D gives h(X)โˆ’12log2โก(2ฯ€eD)โ‰คCโŸนDโ‰ฅ12ฯ€eโ‹…22[h(X)โˆ’C]. For Gaussian XโˆผNormalโก(ฮผ,ฯƒ2), h(X)=12log2โก(2ฯ€eฯƒ2), and the rate-distortion function is R(D)=12log2โก(ฯƒ2/D) for Dโ‰คฯƒ2, achieving the lower bound with equality.

The Information Bottleneck in Neural Systems

The rate-distortion framework tells us how much information we need to retain about the input to achieve a given level of fidelity. But in most learning problems, we do not care about reconstructing the input perfectly; we care about predicting a target variable Y from the input X. The relevant question is not โ€œhow much information about X should we retain?โ€ but rather โ€œwhich information about X should we retain?โ€ This distinction leads to one of the most influential ideas in modern learning theory: the information bottleneck principle.

Theorem 1 (Information Bottleneck).

Let X be an input random variable, Y a target random variable jointly distributed with X, and T a compressed representation of X. The information bottleneck (IB) objective [4] seeks a representation T that retains maximal information about Y while compressing X as much as possible: (IB Objective)minp(t|x)โก๐–จโก(X;T)โˆ’ฮฒ๐–จโก(T;Y), where ฮฒ>0 is a Lagrange multiplier controlling the tradeoff between compression (๐–จโก(X;T)) and prediction (๐–จโก(T;Y)). The optimal encoder pโˆ—(t|x) satisfies the self-consistent equations: (IB Encoder)pโˆ—(t|x)=p(t)Z(x,ฮฒ)expโก(โˆ’ฮฒ๐–ฃKLโก[p(y|x)โ€–p(y|t)]),p(t)=โˆ‘xp(t|x)p(x),p(y|t)=โˆ‘xp(y|x)p(x|t), where Z(x,ฮฒ)=โˆ‘tp(t)expโก(โˆ’ฮฒ๐–ฃKLโก[p(y|x)โ€–p(y|t)]) is a normalising constant, and ๐–ฃKLโก[โ‹…โ€–โ‹…] denotes the Kullback-Leibler divergence.

Proof.

We derive the self-consistent equations using the method of Lagrange multipliers. The IB objective is โ„’[p(t|x)]=๐–จโก(X;T)โˆ’ฮฒ๐–จโก(T;Y)=โˆ‘x,tp(x)p(t|x)logโกp(t|x)p(t)โˆ’ฮฒโˆ‘t,yp(t,y)logโกp(y|t)p(y). We must also enforce the normalisation constraint โˆ‘tp(t|x)=1 for all x. Adding Lagrange multipliers ฮผ(x) for these constraints and taking the functional derivative with respect to p(t|x): ฮดโ„’ฮดp(t|x)=p(x)[logโกp(t|x)p(t)+1]โˆ’ฮฒp(x)โˆ‘yp(y|x)logโกp(y|t)p(y)โˆ’ฮผ(x)=p(x)[logโกp(t|x)p(t)+1โˆ’ฮฒโˆ‘yp(y|x)logโกp(y|t)+ฮฒโˆ‘yp(y|x)logโกp(y)]โˆ’ฮผ(x). Setting this to zero and noting that โˆ‘yp(y|x)logโกp(y|t)โˆ’โˆ‘yp(y|x)logโกp(y|x)=โˆ’๐–ฃKLโก[p(y|x)โ€–p(y|t)] (up to a term that does not depend on t), we obtain logโกpโˆ—(t|x)p(t)=โˆ’ฮฒ๐–ฃKLโก[p(y|x)โ€–p(y|t)]+const(x), where the constant absorbs terms independent of t. Exponentiating both sides: pโˆ—(t|x)=p(t)Z(x,ฮฒ)expโก(โˆ’ฮฒ๐–ฃKLโก[p(y|x)โ€–p(y|t)]), where Z(x,ฮฒ) ensures normalisation. Equations and follow from the definitions of the marginal and the Bayes-optimal decoder, respectively. The three equations are coupled (each depends on the others), and the solution is obtained by alternating iterations [4].

The information bottleneck has a beautiful geometric interpretation. As ฮฒ varies from 0 to โˆž, the optimal representation traces a curve in the (๐–จโก(X;T),๐–จโก(T;Y)) plane called the information curve. At ฮฒ=0, the representation carries no information about either X or Y (total compression). As ฮฒ increases, the representation captures progressively more information about Y, at the cost of retaining more information about X. In the limit ฮฒโ†’โˆž, compression is not penalised, and T retains all information about Y that X contains (i.e., ๐–จโก(T;Y)=๐–จโก(X;Y)).

The information bottleneck curve (information plane). The curve traces the optimal tradeoff between compression ๐–จโก(X;T) and prediction ๐–จโก(T;Y) as the Lagrange multiplier ฮฒ varies. The shaded region represents feasible representations; points above the curve are unachievable. The dashed horizontal line marks the maximum possible prediction information ๐–จโก(X;Y); the dashed diagonal marks the data processing inequality constraint ๐–จโก(T;Y)โ‰ค๐–จโก(X;T).
Connection to deep learning.

Shwartz-Ziv and Tishby [70] proposed that the layers of a deep neural network can be viewed as successive information bottlenecks: each layer Tโ„“ compresses the representation from the previous layer while (ideally) preserving information about the target Y. Their empirical analysis of fully connected networks trained on simple classification tasks revealed a striking two-phase training dynamic. During the initial โ€œfittingโ€ phase, the mutual information ๐–จโก(Tโ„“;Y) increases rapidly as the network learns to predict the target. During the subsequent โ€œcompressionโ€ phase, ๐–จโก(X;Tโ„“) decreases as the network learns to discard input information that is not relevant to prediction.

This two-phase dynamic mirrors the brain's developmental trajectory: the early synaptogenesis phase (expanding connectivity to capture information about the environment) corresponds to the fitting phase, while the subsequent pruning phase (eliminating connections that carry noise rather than signal) corresponds to the compression phase.

Remark 2.

The information bottleneck interpretation of deep learning has been the subject of significant debate. Saxe et al. [5] showed that the compression phase observed by Shwartz-Ziv and Tishby depends on the choice of activation function: networks with saturating nonlinearities (such as tanhโก) exhibit compression, while networks with non-saturating nonlinearities (such as ReLU) do not. Furthermore, estimating mutual information in high dimensions is notoriously difficult, and the precise values reported in information-plane analyses are sensitive to the estimation method used. Despite these caveats, the qualitative insight that neural networks learn by first fitting and then compressing remains influential and has inspired compression-based approaches to neural architecture search.

Remark 3.

Does the information bottleneck explain why the brain prunes synapses? Consider a synapse that carries mutual information primarily with noise in the input rather than with the target signal. In information-theoretic terms, this synapse contributes to ๐–จโก(X;T) without contributing to ๐–จโก(T;Y). Eliminating such a synapse reduces ๐–จโก(X;T) (compression) while leaving ๐–จโก(T;Y) (prediction) largely unchanged, moving the representation towards the optimal point on the information bottleneck curve. Synaptic pruning can thus be interpreted as a biological implementation of information bottleneck compression: the brain identifies and removes neural pathways that carry task-irrelevant information, converging towards a representation that is maximally compressed while retaining maximum predictive power.

Information-Theoretic Limits on Architecture Size

The information bottleneck tells us what information an optimal representation should retain. But it does not directly tell us how large the architecture implementing that representation must be. How many parameters does a network need to achieve a given level of predictive performance? And can a network be too large?

These questions lie at the intersection of information theory and statistical learning theory, and the answers have direct implications for neural architecture search: they define the target region in the space of architecture sizes that NAS should aim for.

Minimum description length and architecture selection.

The minimum description length (MDL) principle provides a natural framework for architecture selection. MDL states that the best model for a dataset is the one that minimises the total description length: the number of bits needed to describe the model plus the number of bits needed to describe the data given the model: (MDL)๐’œโˆ—=argโ€‰min๐’œโˆˆ๐’ฎโกL(๐’œ)โŸmodelย cost+L(๐’Ÿ|๐’œ)โŸdataย cost, where L(๐’œ) is the description length of architecture ๐’œ (proportional to the number of parameters if each parameter requires a fixed number of bits to specify), and L(๐’Ÿ|๐’œ) is the description length of the data given the model (related to the negative log-likelihood of the data under the model's best-fit parameters).

Too small an architecture results in high data cost (underfitting): the model cannot capture the structure in the data, so the residuals require many bits to describe. Too large an architecture results in high model cost (overfitting): the model has many parameters, most of which encode noise rather than signal. The MDL-optimal architecture balances these two costs.

Theorem 2 (Architecture Capacity Bound).

Consider a supervised learning task with n i.i.d. samples {(๐’™i,yi)}i=1n drawn from a joint distribution PXY on ๐’ณโกร—๐’ดโก. Let โ„‹๐’œ denote the hypothesis class induced by architecture ๐’œ with |๐’œ|eff effective parameters, where each parameter has capacity at most Cmaxโก bits (i.e., each parameter can represent at most 2Cmaxโก distinct values after quantisation). Then, for the excess risk ฯต>0 to be achievable, the effective architecture size must satisfy (Capacity Bound)|๐’œ|effโ‰ฅnโ‹…๐–งโก(Y|X)log2โก(1/ฯต)โ‹…Cmaxโก.

Proof.

The proof proceeds via a counting argument. An architecture with |๐’œ|eff parameters, each with capacity Cmaxโก bits, can represent at most M=2|๐’œ|effโ‹…Cmaxโก distinct hypotheses. For the hypothesis class to achieve excess risk ฯต on n samples from a distribution with conditional entropy ๐–งโก(Y|X), it must be able to distinguish between at least 2nโ‹…๐–งโก(Y|X) distinct input-output patterns (this follows from Fano's inequality: the probability of error in predicting Y from X is bounded below by a function of the conditional entropy and the number of hypotheses available).

Specifically, by Fano's inequality, for the average probability of error Pe to satisfy Peโ‰คฯต, we need the mutual information between the data and the hypothesis to be at least ๐–จโก(๐’Ÿ;Y^)โ‰ฅnโ‹…๐–งโก(Y|X)โˆ’nโ‹…hb(ฯต)โˆ’nโ‹…ฯตlog2โก(|๐’ดโก|โˆ’1), where hb(ฯต)=โˆ’ฯตlog2โกฯตโˆ’(1โˆ’ฯต)log2โก(1โˆ’ฯต) is the binary entropy. For small ฯต, the last two terms are O(nฯตlogโก(1/ฯต)), and the dominant term is nโ‹…๐–งโก(Y|X).

Since the mutual information between the data and the hypothesis is bounded by the capacity of the hypothesis class, ๐–จโก(๐’Ÿ;Y^)โ‰คlog2โกM=|๐’œ|effโ‹…Cmaxโก, we obtain |๐’œ|effโ‹…Cmaxโกโ‰ฅnโ‹…๐–งโก(Y|X)โ‹…(1โˆ’o(1)), and rearranging (absorbing lower-order terms into the denominator) yields the stated bound.

Definition 5 (Effective Parameter Count).

The effective parameter count |๐’œ|eff of an architecture ๐’œ with nominal parameter count |๐’œ|nom is the minimum number of parameters needed to specify a hypothesis in โ„‹๐’œ to within a precision sufficient for achieving a target excess risk ฯต. Formally, (Effective Params)|๐’œ|eff=log2โก|โ„‹๐’œ(ฯต)|Cmaxโก, where โ„‹๐’œ(ฯต) is the ฯต-covering number of the hypothesis class (the minimum number of hypotheses needed to cover the class at resolution ฯต). In practice, |๐’œ|effโ‰ช|๐’œ|nom for overparameterised networks, reflecting the low intrinsic dimensionality of the learned representation.

PAC-Bayes bounds and architecture priors.

The PAC-Bayes framework provides another information-theoretic lens on architecture selection. A PAC-Bayes bound states that, with probability at least 1โˆ’ฮด over the draw of n training samples, for any posterior distribution Q over hypotheses, (PAC Bayes)๐”ผhโˆผQ[โ„’(h)]โ‰ค๐”ผhโˆผQ[โ„’^(h)]+๐–ฃKLโก[Qโ€–P]+logโก(n/ฮด)2n, where โ„’(h) is the true risk, โ„’^(h) is the empirical risk, and P is a prior distribution over hypotheses chosen before seeing the data. The key quantity is the KL divergence ๐–ฃKLโก[Qโ€–P]: the โ€œsurpriseโ€ of the posterior relative to the prior.

When applied to architecture search, the prior P is a distribution over architectures (and their parameters), and the KL term penalises architectures that deviate significantly from prior expectations. A well-chosen prior, informed by domain knowledge or by the structure of previously successful architectures, can dramatically tighten the bound and guide the search towards architectures with strong generalisation guarantees.

Proposition 5 (PAC-Bayes Architecture Selection).

Let ๐’ฎ={๐’œ1,โ€ฆ,๐’œK} be a finite set of candidate architectures, and let P(๐’œk) be a prior probability over architectures satisfying โˆ‘kP(๐’œk)=1. For each architecture ๐’œk, let Pk and Qk be the prior and posterior over parameters, respectively. Then the PAC-Bayes bound for the architecture selection problem is: with probability โ‰ฅ1โˆ’ฮด, (PAC Bayes ARCH)๐”ผQ[โ„’]โ‰ค๐”ผQ[โ„’^]+๐–ฃKLโก[Qkโ€–Pk]+logโก(1/P(๐’œk))+logโก(2n/ฮด)2n for any architecture ๐’œk and any posterior Qk over its parameters. The term logโก(1/P(๐’œk)) penalises architectures with low prior probability, favouring simpler or more โ€œexpectedโ€ designs.

Proof.

Apply the standard PAC-Bayes theorem ((PAC Bayes)) with the combined prior P=โˆ‘kP(๐’œk)โ‹…Pk over architecture-parameter pairs. For a specific architecture ๐’œk with posterior Qk over parameters, the KL divergence decomposes as ๐–ฃKLโก[Qkโ€–P]=๐–ฃKLโก[Qkโ€–Pk]+logโก1P(๐’œk), since Qk is supported entirely on architecture ๐’œk. Substituting into the PAC-Bayes bound yields the result.

Caution.

Larger networks can memorise the training data but may not generalise. The information bottleneck principle suggests that there exists an optimal architecture size for each task: neither too small (leading to underfitting and high distortion) nor too large (leading to overfitting and wasted capacity). This optimal size depends on the task's intrinsic dimensionality: the number of independent factors of variation in the data-generating process. A task with low intrinsic dimensionality (e.g., recognising handwritten digits, which can be described by a few stroke parameters) requires a smaller architecture than a task with high intrinsic dimensionality (e.g., generating photorealistic images, which requires modelling texture, lighting, geometry, and semantics simultaneously). Neural architecture search should target architectures near this optimal size, not simply maximise parameter count.

QuantityRole in Architecture Sizing
๐–งโก(Y|X)Irreducible noise; sets the lower bound on achievable loss regardless of architecture
๐–จโก(X;Y)Total learnable information; upper bounds the useful capacity the architecture must provide
๐–จโก(X;T)Representation complexity; should be minimised subject to preserving ๐–จโก(T;Y)
๐–จโก(T;Y)Prediction quality; should be maximised subject to compression constraints
CmaxโกPer-parameter capacity; depends on numerical precision (float32: โˆผ23 bits mantissa)
|๐’œ|effEffective architecture size; the actual โ€œusefulโ€ parameter count
๐–ฃKLโก[Qโ€–P]PAC-Bayes complexity; penalises deviation from prior architecture expectations
Information-theoretic quantities and their roles in architecture sizing. Each quantity constrains a different aspect of the architecture design problem.

Exercise 3.

Gaussian information bottleneck. Consider the jointly Gaussian case: XโˆผNormalโก(0,ฯƒX2) and Y=aX+ฯต where ฯตโˆผNormalโก(0,ฯƒฯต2) is independent of X. (a) Compute ๐–จโก(X;Y). (b) Show that the optimal IB representation is T=X+ฮฝ where ฮฝโˆผNormalโก(0,ฯƒฮฝ2) for an appropriate choice of ฯƒฮฝ2 depending on ฮฒ. (c) Derive the IB curve ๐–จโก(T;Y) as a function of ๐–จโก(X;T) and verify it is concave. (d) Find the value of ฮฒ at which the IB solution transitions from T being independent of X to T carrying information about X (the โ€œphase transitionโ€).

Exercise 4.

MDL for polynomial regression. Consider fitting a polynomial of degree d to n=20 data points generated from y=sinโก(x)+ฯต with ฯตโˆผNormalโก(0,0.12) and x uniformly sampled from [0,2ฯ€]. (a) For each degree dโˆˆ{1,2,โ€ฆ,15}, compute the MDL criterion: model cost =(d+1)โ‹…32 bits (assuming float32 parameters) plus data cost =โˆ’โˆ‘i=1nlog2โกp(yi|๐’™,๐œฝ^d) where ๐œฝ^d is the least-squares fit. (b) Plot the total MDL as a function of d and identify the optimal degree dโˆ—. (c) Compare dโˆ— with the degree selected by 5-fold cross-validation.

Challenge 1.

PAC-Bayes-guided architecture search. Design a simple architecture search algorithm that uses the PAC-Bayes bound in (PAC Bayes ARCH) as its objective. Consider a search space of fully connected networks with Lโˆˆ{1,โ€ฆ,5} hidden layers, each with width wโˆˆ{16,32,64,128,256}. (a) Define a prior P(๐’œ) over the 25 possible architectures (hint: use a prior that favours smaller networks). (b) For each architecture, train the network on a simple classification task (e.g., MNIST) and compute the PAC-Bayes bound using a Gaussian posterior centred on the trained weights. (c) Select the architecture that minimises the bound. (d) Compare with the architecture selected by validation accuracy. Do the two criteria agree?

From Brains to Machines: The Adaptive Network Hypothesis

We have established that nature builds brains through a remarkable process of expansion, evaluation, and pruning, subject to stringent physical and information-theoretic constraints. The infant brain generates a massively over-connected network, tests each connection against the statistics of the environment, and eliminates those that do not earn their metabolic keep. The resulting architecture is not designed from first principles but discovered through a search process that combines genetic priors with experiential refinement.

The central question of this chapter crystallises: Can we engineer the same process for artificial neural networks? Can we build systems that do not merely learn better weights for a fixed architecture but learn the architecture itself, adapting their structure to the task at hand? And can we do this efficiently enough to be practical, compressing the biological search that unfolds over years of development (and millions of years of evolution) into hours or days of computation?

Can Neural Networks Grow New Neurons?

Biological neurogenesis revisited.

In the adult brain, the birth of new neurons (neurogenesis) is highly restricted. The two primary sites of adult neurogenesis are the subgranular zone of the hippocampal dentate gyrus (where new neurons contribute to memory formation) and the subventricular zone lining the lateral ventricles (where new neurons migrate to the olfactory bulb) [64]. The rate of hippocampal neurogenesis in humans has been estimated at approximately 700 new neurons per day in each hippocampus, a small number compared to the hippocampus's roughly 40 million existing neurons.

The limited scope of adult neurogenesis means that the brain's primary mode of adaptation in adulthood is rewiring rather than growth: existing connections are strengthened, weakened, or eliminated, and new synapses can form between existing neurons, but the addition of entirely new computational units is rare. This rewiring comes at a cost: strengthening connections in one circuit often requires weakening connections in others, a phenomenon that manifests as the familiar experience of forgetting. The brain manages this tradeoff through sophisticated consolidation mechanisms that protect important memories while allowing less critical ones to fade, a theme we will return to in Sleep, Dreams, and Offline Consolidation.

Artificial analogs: dynamic network expansion.

Several approaches in the machine learning literature mirror different aspects of biological network growth.

Definition 6 (Function-Preserving Network Expansion).

A function-preserving network expansion transforms a trained network f๐œฝ,๐’œ with architecture ๐’œ into a larger network f๐œฝโ€ฒ,๐’œโ€ฒ with architecture ๐’œโ€ฒโŠƒ๐’œ such that (Function Preserving)f๐œฝโ€ฒ,๐’œโ€ฒ(๐’™)=f๐œฝ,๐’œ(๐’™)โˆ€๐’™โˆˆ๐’ณโก. The expanded network has strictly more parameters than the original (|๐’œโ€ฒ|>|๐’œ|) but computes exactly the same function at initialisation. Subsequent training of f๐œฝโ€ฒ,๐’œโ€ฒ can then explore the enlarged capacity of the new architecture.

Chen et al. [62] introduced two specific operators for function-preserving expansion. The Net2WiderNet operator adds neurons to a hidden layer by cloning an existing neuron and splitting its outgoing weights by a factor of two, so that the summed contribution to the next layer is unchanged. The Net2DeeperNet operator adds a new layer initialised as the identity function (for fully connected layers, ๐–new=๐ˆ; for convolutional layers, a 1ร—1 identity filter), so that the network's input-output mapping is preserved.

Proposition 6 (Net2WiderNet Preserves Function).

Let f be a network with a hidden layer of width m with weight matrices ๐–(1)โˆˆโ„mร—dโก (input to hidden) and ๐–(2)โˆˆโ„kร—mโก (hidden to output), and let ฯ• denote the element-wise activation function. The Net2WiderNet operation replaces the hidden layer with width m+1 by choosing an index jโˆˆ{1,โ€ฆ,m} and setting: (Net2wider W1)๐–~i,:(1)=๐–i,:(1)forย i=1,โ€ฆ,m,๐–~m+1,:(1)=๐–j,:(1),๐–~:,i(2)=๐–:,i(2)forย iโ‰ j,๐–~:,j(2)=12๐–:,j(2),๐–~:,m+1(2)=12๐–:,j(2). Then f~(๐’™)=f(๐’™) for all ๐’™.

Proof.

Let ๐’‰=ฯ•(๐–(1)๐’™+๐’ƒ(1)) be the hidden activations. The output of the original network is ๐’š=๐–(2)๐’‰+๐’ƒ(2). After the Net2WiderNet operation, the new hidden activations are ๐’‰~=[๐’‰โŠค,hj]โŠคโˆˆโ„m+1โก, where hj is the activation of the cloned neuron (identical to the j-th original activation since ๐–~m+1,:(1)=๐–j,:(1)). The new output is ๐’š~=๐–~(2)๐’‰~+๐’ƒ(2)=โˆ‘iโ‰ j๐–:,i(2)hi+12๐–:,j(2)hj+12๐–:,j(2)hj+๐’ƒ(2)=โˆ‘iโ‰ j๐–:,i(2)hi+๐–:,j(2)hj+๐’ƒ(2)=๐–(2)๐’‰+๐’ƒ(2)=๐’š.

Progressive growing.

An alternative to expanding a trained network is to build the architecture progressively from scratch. Karras et al. [63] demonstrated this approach dramatically in the context of generative adversarial networks (GANs): both the generator and discriminator start as simple networks that produce and evaluate 4ร—4 pixel images, and new layers are added incrementally to handle progressively higher resolutions (8ร—8, 16ร—16, and so on up to 1024ร—1024). Each new layer is โ€œfaded inโ€ using a learned blending parameter ฮฑ that smoothly interpolates between the output of the previous (lower-resolution) layer and the new (higher-resolution) layer, preventing sudden disruptions to the training dynamics.

Definition 7 (Adaptive Network).

An adaptive network is a neural network f๐œฝ,๐’œ in which both the parameters ๐œฝโˆˆโ„|๐’œ|โก and the architecture ๐’œโˆˆ๐’ฎ evolve during or between training phases. Formally, the evolution is governed by a joint dynamical system: (Adaptive Theta)๐œฝt+1=๐œฝtโˆ’ฮทฮธโˆ‡๐œฝโ„’(๐œฝt,๐’œt),๐’œt+1=๐’ฏ(๐’œt,๐œฝt,๐’Ÿ), where ฮทฮธ is the parameter learning rate, โ„’ is the loss function, and ๐’ฏ:๐’ฎร—โ„|๐’œ|โกร—๐’Ÿโ†’๐’ฎ is an architecture transition operator that modifies the architecture based on the current parameters and data. Unlike a standard neural network (where ๐’œ is fixed at initialisation and only ๐œฝ evolves), an adaptive network permits structural modifications including:

  1. Adding or removing neurons (changing layer widths);

  2. Adding or removing layers (changing network depth);

  3. Changing connectivity patterns (e.g., adding skip connections);

  4. Modifying operation types (e.g., replacing convolutions with attention).

Key Idea.

The central question for this chapter, and for the field of neural architecture search more broadly, is this: Can we build foundation models that adapt their architecture, not just their weights, to new tasks, new domains, and new modalities? The biological brain demonstrates that this is possible in principle: the same basic neural substrate can, through developmental sculpting and lifelong plasticity, produce circuits specialised for vision, language, motor control, social cognition, and abstract reasoning. If the brain can do it, what stops machines? The answer, as we shall see, is not a fundamental impossibility but a collection of computational challenges: the search space is vast, evaluation is expensive, and the interaction between architecture and weights is complex. The remainder of this chapter develops the mathematical tools to address each of these challenges.

Sleep, Dreams, and Offline Consolidation

The brain does not learn only while awake. Some of the most important computational processes in the brain occur during sleep, when the organism is disconnected from sensory input and freed from the demands of real-time behaviour. Understanding sleep's role in neural computation provides unexpected insights for the design of adaptive artificial networks.

Hippocampal replay and memory consolidation.

During wakefulness, the hippocampus acts as a rapid learning system, quickly encoding new experiences as patterns of neural activity. These newly formed memories are initially โ€œfragileโ€: they depend on the specific synaptic connections within the hippocampus and can be disrupted by subsequent learning (new experiences may overwrite the same synaptic connections, causing catastrophic forgetting).

During sleep, particularly during slow-wave (deep) sleep, the hippocampus โ€œreplaysโ€ recently encoded experiences to the neocortex [71][72]. Place cells in the hippocampus that fired in sequence during spatial navigation, for example, fire in the same sequence during sleep, but at a compressed timescale (approximately 5โ€“20ร— faster than the original experience). This replay is believed to serve several functions:

  1. Memory consolidation: by repeatedly reactivating recent memories, replay strengthens the neocortical representations of these memories, gradually transferring them from hippocampal short-term storage to neocortical long-term storage.

  2. Memory integration: replay allows new memories to be interleaved with older ones, facilitating the discovery of connections and patterns across experiences that were temporally separated.

  3. Synaptic homeostasis: the net effect of replay, combined with global synaptic down-scaling, is to strengthen important connections while weakening unimportant ones, a form of offline architecture optimisation.

The synaptic homeostasis hypothesis.

Tononi and Cirelli [71] proposed the synaptic homeostasis hypothesis (SHY): during wakefulness, learning causes a net increase in synaptic strength across the brain (because Hebbian learning is predominantly potentiating). This net increase has costs: higher energy consumption, reduced signal-to-noise ratio (because all synapses, including noise-carrying ones, are strengthened), and reduced capacity for further learning (because synapses approach their maximum strength). During sleep, a global process of synaptic renormalisation reduces all synaptic strengths proportionally, with one crucial caveat: synapses that have been most strongly potentiated (those carrying the most important information) resist renormalisation more effectively than weakly potentiated synapses. The result is a net pruning effect: weak, noisy connections are driven below the survival threshold and eliminated, while strong, signal-carrying connections survive in a slightly weakened but more energy-efficient form.

We can formalise this process as follows. Let wijwake denote the synaptic weight after a period of wakefulness, and let ฮณโˆˆ(0,1) be the global renormalisation factor. The weight after sleep-dependent renormalisation is (Synaptic Renorm)wijsleep=ฮณโ‹…wijwake+(1โˆ’ฮณ)โ‹…w^ij, where w^ij is a โ€œreplay-dependent correctionโ€ that is large for synapses involved in replayed memories and small (or zero) for synapses not involved in replay. Synapses with wijsleep<ฯ„prune are eliminated. The combined effect of global down-scaling (ฮณ<1) and selective replay (w^ij>0 for important synapses) implements a form of experience-dependent pruning during offline processing.

Two-phase learning inspired by the wake-sleep cycle. During the wake (online) phase, the network processes new data, updates parameters via gradient descent, and stores experiences in a replay buffer (analogous to hippocampal encoding). During the sleep (offline) phase, stored experiences are replayed, knowledge is consolidated through distillation, underused parameters and modules are pruned, and the architecture is restructured for efficiency. Arrows indicate the bidirectional transfer of information between phases.
Can foundation models โ€œsleepโ€?

The biological sleep-wake cycle suggests a computational paradigm for adaptive artificial networks. During periods when a deployed foundation model is not actively serving inference requests (or during scheduled maintenance windows), the model could engage in โ€œsleep-likeโ€ offline processing:

  1. Replay: revisit important or challenging examples from a stored experience buffer, reinforcing representations that might otherwise decay due to subsequent fine-tuning.

  2. Consolidation: distil knowledge from a large โ€œteacherโ€ model (or from the model's own earlier checkpoints) into a smaller, more efficient โ€œstudentโ€ architecture, a process analogous to the transfer of memories from hippocampus to neocortex.

  3. Pruning: identify and remove parameters, attention heads, or entire layers that contribute minimally to model performance, reducing the model's computational footprint.

  4. Architecture restructuring: modify the network topology (e.g., adjusting the allocation of layers to different modalities in a multimodal model) based on usage statistics collected during the โ€œwakeโ€ phase.

Shetty and others [73] proposed the NeuroDream framework, which implements a sleep-inspired consolidation phase for continual learning. During the โ€œdreamโ€ phase, the model generates synthetic examples from its own learned distribution and uses them as additional training data, interleaved with a small buffer of real examples. This self-generated replay serves the same function as hippocampal replay: it reinforces previously learned knowledge without requiring access to the original training data, mitigating catastrophic forgetting.

Remark 4.

The connection between sleep-inspired computation and continual learning is deep. Replay-based continual learning methods, which maintain a buffer of exemplars from previous tasks and interleave them with current-task training data, are computational analogs of hippocampal replay during sleep. Regularisation-based methods, which penalise changes to parameters important for previous tasks (such as Elastic Weight Consolidation; [6]), are analogs of the selective protection of important synapses during sleep-dependent renormalisation. Architectural methods, which allocate different subnetworks to different tasks, are analogs of the brain's strategy of dedicating specialised cortical circuits to different sensory modalities while sharing common computational motifs.

Caution.

Implementing a sleep-like offline phase in production systems carries nontrivial costs. The replay buffer requires storage proportional to the number of experiences retained (with privacy implications if training data is sensitive). The consolidation and pruning phases require compute resources that could otherwise serve inference requests. And the architecture restructuring phase introduces a risk of performance regression if the modifications are poorly calibrated. These costs must be weighed against the benefits of improved efficiency and sustained performance. The biological brain faces an analogous tradeoff: sleep consumes approximately one-third of an organism's life, during which it is vulnerable to predators and unable to forage. The fact that evolution has preserved sleep across virtually all animal species, despite these costs, suggests that the benefits of offline consolidation are substantial.

The Architecture Search Problem: First Formulation

We are now ready to state the neural architecture search problem in its full mathematical generality. The formulation draws on all the threads we have developed: the biological analogy of developmental search, the information-theoretic constraints on architecture size, and the adaptive network hypothesis that architecture and weights should co-evolve.

Definition 8 (Neural Architecture Search Problem).

The neural architecture search (NAS) problem is a bilevel optimisation: (Bilevel)๐’œโˆ—=argโ€‰min๐’œโˆˆ๐’ฎโกโ„’val(f๐œฝโˆ—(๐’œ),๐’œ) subject to (Inner LOOP)๐œฝโˆ—(๐’œ)=argโ€‰min๐œฝโˆˆโ„|๐’œ|โกโกโ„’train(f๐œฝ,๐’œ), where:

  • ๐’ฎ is the search space: the set of all architectures under consideration;

  • f๐œฝ,๐’œ:๐’ณโกโ†’๐’ดโก is the neural network with architecture ๐’œ and parameters ๐œฝ;

  • โ„’train is the training loss (evaluated on training data);

  • โ„’val is the validation loss (evaluated on held-out data, serving as a proxy for generalisation);

  • ๐œฝโˆ—(๐’œ) denotes the optimal weights for architecture ๐’œ, obtained by solving the inner optimisation problem.

The outer loop searches over architectures; the inner loop, for each candidate architecture, trains the weights to optimality (or an approximation thereof).

The bilevel structure of the NAS problem is both its defining characteristic and its primary computational challenge. The outer loop is a combinatorial (or mixed continuous-discrete) optimisation over the structured space of architectures. The inner loop is a continuous optimisation over weights, which is itself a high-dimensional, non-convex problem that typically requires many gradient descent steps to solve. The coupling between the two levels is what makes NAS fundamentally different from (and harder than) standard hyperparameter optimisation: the value of the outer objective at a given architecture depends on the solution of the inner problem at that architecture, not merely on the architecture's โ€œshape.โ€

Proposition 7 (NAS Hardness).

The neural architecture search problem (Definition 8) is NP-hard in general.

Proof.

We prove NP-hardness by reduction from the Subset Selection problem, which is known to be NP-hard. Consider the following restricted instance of NAS. Let the search space ๐’ฎ consist of all subsets of d features from a set of D candidate features (d<D), and let the architecture be a linear model f๐œฝ,๐’œ(๐’™)=๐œฝโŠค๐’™๐’œ where ๐’™๐’œ is the restriction of ๐’™ to the features in ๐’œ. The inner optimisation (linear regression) has a closed-form solution: ๐œฝโˆ—(๐’œ)=(๐—๐’œโŠค๐—๐’œ)โˆ’1๐—๐’œโŠค๐’š. The outer optimisation is then ๐’œโˆ—=argโ€‰min๐’œโІ{1,โ€ฆ,D},|๐’œ|=dโกโ€–๐’šโˆ’๐—๐’œ(๐—๐’œโŠค๐—๐’œ)โˆ’1๐—๐’œโŠค๐’šโ€–22, which is the best-subset selection problem in linear regression. This problem is NP-hard by reduction from Maximum Clique [7]. Since best-subset selection is a special case of NAS (with a trivially solvable inner loop), the general NAS problem is at least as hard.

In the general case where the inner loop requires iterative optimisation (e.g., training a deep network), the problem is even harder: evaluating a single architecture requires solving a non-convex optimisation problem whose cost scales with the network size and training set size, and the total number of candidate architectures can be combinatorially large.

The NP-hardness result does not mean that NAS is hopeless in practice. Many NP-hard problems (including integer programming, satisfiability, and graph colouring) admit efficient approximate solutions on the instances that arise in practice. The key is to exploit the structure of the problem: the search space is not arbitrary but has regularities (good architectures tend to share structural motifs), the inner loop can be approximated (using techniques such as weight sharing, early stopping, or performance predictors), and the outer loop can be guided by gradient information (using continuous relaxations of the discrete search space).

The three pillars of NAS.

Every NAS method, regardless of its specific algorithmic details, must address three fundamental questions:

  1. Search space ๐’ฎ: What architectures are possible? The search space defines the set of candidate architectures and thereby determines both the upper bound on achievable performance (no architecture outside ๐’ฎ can be found, regardless of the search strategy) and the computational cost of the search (a larger space requires more exploration). Search spaces range from small, highly structured spaces (e.g., varying only the width and depth of a fixed architecture template) to large, flexible spaces (e.g., the space of all directed acyclic graphs with arbitrary operations at each node).

  2. Search strategy: How do we explore ๐’ฎ? The search strategy is the algorithm that proposes candidate architectures for evaluation. Options include random search, evolutionary algorithms, reinforcement learning, Bayesian optimisation, and gradient-based methods. The choice of strategy determines how efficiently the search converges to good architectures and how robustly it avoids local optima.

  3. Performance estimation: How do we evaluate architectures without full training? Since the inner loop (training an architecture to convergence) is typically the computational bottleneck, practical NAS methods employ approximations: training for fewer epochs, training on a subset of the data, using smaller proxy tasks, or sharing weights across architectures. The accuracy of the performance estimator determines the reliability of the search: a poor estimator may rank architectures incorrectly, leading the search astray.

The three pillars of neural architecture search. Every NAS method must define a search space (what architectures can be considered), a search strategy (how to explore the space), and a performance estimation method (how to evaluate candidate architectures efficiently). The three pillars are interdependent: the search space constrains the search strategy, the performance estimator guides both space design and strategy, and the strategy determines which architectures are evaluated.
PillarMethodKey Idea
3*Search SpaceCell-basedSearch for a cell (small DAG), then stack cells to form the full network
Macro searchSearch over the full network topology directly
HierarchicalCompose cells at multiple levels of granularity
4*Search StrategyRandom searchUniformly sample architectures; strong baseline
EvolutionaryMaintain a population; mutate, crossover, select
RL-basedTrain a controller to generate architectures via policy gradient
Gradient-basedRelax discrete choices to continuous; optimise via backpropagation
4*[l]Performance
EstimationFull trainingTrain each candidate to convergence; accurate but expensive
Weight sharingShare weights across architectures via a supernet
Early stoppingTrain for few epochs; use as proxy for final performance
Predictor-basedTrain a surrogate model to predict performance from architecture features
Representative methods for each pillar of neural architecture search. The landscape of NAS methods is vast; this table highlights foundational and influential approaches that are developed in subsequent sections of this chapter.

Remark 5.

The bilevel structure of NAS mirrors the brain's own developmental process at two timescales. The โ€œouter loopโ€ of evolutionary pressure shapes the brain's architecture over generations: species whose genetic programmes produce more effective neural architectures leave more offspring, gradually refining the architectural priors encoded in DNA. The โ€œinner loopโ€ of synaptic plasticity tunes the weights within a single organism's lifetime, optimising the specific wiring configuration for that individual's environment. NAS compresses these two timescales, millions of years of evolution and decades of individual development, into hours or days of computation. The fact that this compression is possible at all reflects the enormous computational power of modern hardware and the ingenuity of the search algorithms we will develop in subsequent sections.

Exercise 5.

Bilevel optimisation for feature selection. Consider a linear regression problem with D=10 candidate features and n=50 training samples. The true model uses only d=3 features. (a) Formulate the feature selection problem as a bilevel optimisation (eq:nas:bilevel,eq:nas:inner-loop) with the search space ๐’ฎ={๐’œโІ{1,โ€ฆ,10}:|๐’œ|=3}. (b) Enumerate all (103)=120 architectures and evaluate each by solving the inner loop (ordinary least squares) and computing the validation loss. (c) Verify that the optimal architecture recovers the true feature set. (d) Compare the computational cost of exhaustive search with that of forward stepwise selection. At what value of D does exhaustive search become impractical?

Exercise 6.

Weight sharing intuition. Consider a search space of two-layer fully connected networks with hidden width wโˆˆ{8,16,32,64}. (a) Explain how a single โ€œsupernetโ€ with width 64 can represent all four architectures through masking. (b) Train the supernet on a simple task (e.g., classifying two-dimensional spirals). (c) Evaluate each sub-architecture by applying the appropriate mask to the supernet weights (without retraining) and computing validation accuracy. (d) Compare the supernet-based ranking with the ranking obtained by training each architecture independently from scratch. Do the rankings agree? Discuss potential sources of discrepancy.

Challenge 2.

A brain-inspired NAS algorithm. Design a NAS algorithm that mimics the brain's developmental strategy. Start with a large, randomly connected network. Implement the following: (a) a โ€œsynaptogenesisโ€ phase that adds random connections between neurons; (b) a โ€œHebbian evaluationโ€ phase that strengthens connections whose endpoints are co-activated and weakens others (using the regularised Hebbian rule from (HEBB Continuous)); (c) a โ€œpruningโ€ phase that removes connections whose weights fall below a threshold; (d) a โ€œsleepโ€ phase that globally rescales remaining weights (using (Synaptic Renorm)). Run this algorithm on MNIST or CIFAR-10 and compare the final architecture (after pruning) with architectures found by standard NAS methods. Does the brain-inspired approach find competitive architectures?

Historical Note.

The idea of automatically designing neural network architectures is far older than the term โ€œneural architecture search.โ€ In 1989, David Miller, Philip Todd, and Suresh Hegde used genetic algorithms to evolve the connectivity patterns of small neural networks [8]. In the 1990s and 2000s, the field of neuroevolution flourished, with researchers evolving both architectures and weights using evolutionary algorithms. Kenneth Stanley's NEAT (NeuroEvolution of Augmenting Topologies, 2002) was particularly influential: it evolved neural network topologies by starting with minimal networks and incrementally adding neurons and connections, using a โ€œspeciationโ€ mechanism to protect novel architectures from premature extinction by allowing them time to optimise their weights [9]. The modern NAS era began with the work of Zoph and Le (2017), who used reinforcement learning to search for architectures and demonstrated that automatically designed networks could match or exceed the performance of hand-designed ones on image classification benchmarks [10]. The subsequent development of efficient NAS methods (weight sharing, differentiable architecture search, one-shot methods) transformed architecture search from a curiosity requiring thousands of GPU-days into a practical tool that can run on a single GPU in hours.

A brief timeline of neural architecture search. The field evolved from early genetic algorithm approaches (1989) through neuroevolution (2002) to modern reinforcement learning and gradient-based methods (2017โ€“present). A key turning point was the introduction of weight sharing (ENAS, 2018) and differentiable search (DARTS, 2019), which reduced the computational cost of NAS from thousands of GPU-days to a single GPU-day.

The Forgetting-Adaptation Tradeoff

We have seen that the brain's architecture evolves throughout life. Neurons sprout new dendrites, synapses strengthen and weaken, and entire cortical regions can be repurposed following injury. But evolution has a price: change something, and you risk breaking something else. A surgeon who rewires the motor cortex to restore movement after a stroke may inadvertently disrupt fine motor control that took decades to refine. The stability-plasticity dilemma haunts both biological and artificial neural systems, and it becomes especially acute when the architecture itself, not merely the weights, is subject to modification.

In previous sections we established the formal framework for describing neural architectures as mathematical objects and showed how search procedures can navigate architecture spaces. Now we confront a deeper question: when the architecture changes to accommodate new capabilities, what happens to the old ones? This question sits at the intersection of neural architecture search and continual learning (26), and its resolution determines whether adaptive networks can be deployed in the real world.

Catastrophic Forgetting Revisited

The phenomenon of catastrophic forgetting, studied extensively in 26, arises when a neural network trained on task A is subsequently trained on task B and suffers dramatic performance degradation on task A. The mechanism is straightforward: the gradient updates that improve performance on task B move the parameter vector ๐œฝ away from the region of parameter space that was optimal for task A. If the loss landscape for task A is sharply curved near ๐œฝAโˆ—, even small perturbations can cause large increases in โ„’A.

The classical analysis of catastrophic forgetting considers a fixed architecture and asks how parameter changes affect performance. But adaptive networks introduce a third dimension to the stability-plasticity dilemma: not just parameter plasticity (how freely should weights change?) but structural plasticity (how freely should the architecture itself change?).

Consider a concrete scenario. A vision transformer has been trained to recognize everyday objects. Now we wish to add medical imaging capabilities. We could simply fine-tune the existing weights, risking catastrophic forgetting of everyday objects. Alternatively, we could add new attention heads specialised for medical features, add new layers for fine-grained texture analysis, or even replace some existing components with more suitable ones. Each structural change carries its own risk of forgetting.

The key insight is that structural changes can be more or less disruptive than parameter changes, depending on how they interact with existing computations. Adding a new module that operates in parallel with existing ones (e.g., a new attention head) is relatively safe. Replacing an existing module (e.g., swapping a convolutional layer for an attention layer) is inherently risky. Removing a module is the most dangerous of all, since it destroys the computations that module performed.

To reason formally about these distinctions, we need a measure of architectural capacity for change.

Definition 9 (Architecture Plasticity).

The architecture plasticity ฮจ(๐’œ) of an architecture ๐’œ is the capacity of ๐’œ to accommodate new tasks without degrading performance on existing ones. Formally, (ARCH Plasticity)ฮจ(๐’œ)=supTโก|T| where the supremum is taken over all sets T of tasks that can be learned sequentially such that, for each prior task t and a tolerance ฯต>0, the forgetting is bounded: (Bounded Forgetting)ฮ”โ„’t=โ„’t(๐œฝafter)โˆ’โ„’t(๐œฝtโˆ—)โ‰คฯต. An architecture with ฮจ(๐’œ)=โˆž can, in principle, learn an unlimited number of tasks without forgetting. In practice, ฮจ(๐’œ) depends on ฯต, on the similarity of tasks, and on the total capacity (number of parameters) of ๐’œ.

The definition captures an important asymmetry: a narrow, deep network may have high representational capacity (it can approximate complex functions) but low plasticity (its parameters are tightly coupled, so changing one layer affects all subsequent layers). A wide, modular network may have lower representational capacity per parameter but higher plasticity because modules can be modified independently.

Historical Note.

The stability-plasticity dilemma was first articulated by Stephen Grossberg in the 1980s in the context of adaptive resonance theory (ART) [11]. Grossberg asked a deceptively simple question: how can a learning system incorporate new information without corrupting previously learned knowledge? The question predates modern deep learning by decades, yet it remains one of the most fundamental unsolved problems in artificial intelligence.

In the biological setting, the brain resolves the dilemma through a combination of complementary learning systems (the hippocampus for rapid learning and the neocortex for slow consolidation), structural plasticity (growing new synapses and pruning old ones), and sleep (offline consolidation of new memories into long-term storage). Each of these mechanisms has computational analogues that inform modern approaches to adaptive neural networks, though none has been fully replicated in artificial systems.

The extension of the stability-plasticity dilemma from parameters to architectures is a more recent development, driven by the emergence of neural architecture search and the growing interest in continual learning at scale. The realisation that structural changes to a network can be both more powerful and more dangerous than parametric changes has opened a new frontier in the study of adaptive systems.

How does architecture change affect forgetting? The following proposition quantifies the relationship.

Proposition 8 (Forgetting Under Architecture Change).

Let ๐’œ1 be an architecture trained to optimality on task 1, achieving parameters ๐œฝ๐’œ1โˆ—. Suppose architecture ๐’œ2 is obtained by modifying ๐’œ1, and let ๐œฝ๐’œ2โˆ— denote the optimal parameters of ๐’œ2 after training on task 2. Then the forgetting on task 1 is bounded by (Forgetting Bound)ฮ”โ„’1โ‰คโ€–๐œฝ๐’œ2โˆ—โˆ’๐œฝ๐’œ1โˆ—โ€–๐…1+๐’Ÿ(๐’œ1,๐’œ2), where ๐…1 is the Fisher information matrix of the model on task 1, โ€–๐’—โ€–๐…1=๐’—โŠค๐…1๐’— is the Fisher norm, and ๐’Ÿ(๐’œ1,๐’œ2) is an architectural divergence measuring the structural difference between ๐’œ1 and ๐’œ2.

Proof.

We decompose the forgetting into a parameter component and a structural component. Let โ„’1(๐œฝ,๐’œ) denote the loss on task 1 for parameters ๐œฝ under architecture ๐’œ. We write (Forgetting Decomp)ฮ”โ„’1=โ„’1(๐œฝ๐’œ2โˆ—,๐’œ2)โˆ’โ„’1(๐œฝ๐’œ1โˆ—,๐’œ1)=โ„’1(๐œฝ๐’œ2โˆ—,๐’œ1)โˆ’โ„’1(๐œฝ๐’œ1โˆ—,๐’œ1)โŸparameterย shiftย (sameย architecture)+โ„’1(๐œฝ๐’œ2โˆ—,๐’œ2)โˆ’โ„’1(๐œฝ๐’œ2โˆ—,๐’œ1)โŸstructuralย shiftย (sameย parameters). For the parameter shift term, we apply a second-order Taylor expansion of โ„’1 around ๐œฝ๐’œ1โˆ— under architecture ๐’œ1. Since ๐œฝ๐’œ1โˆ— is a local minimum, the gradient vanishes, and we obtain (Taylor Param)โ„’1(๐œฝ๐’œ2โˆ—,๐’œ1)โˆ’โ„’1(๐œฝ๐’œ1โˆ—,๐’œ1)โ‰ˆ12(๐œฝ๐’œ2โˆ—โˆ’๐œฝ๐’œ1โˆ—)โŠค๐‡1(๐œฝ๐’œ2โˆ—โˆ’๐œฝ๐’œ1โˆ—), where ๐‡1 is the Hessian of โ„’1 at ๐œฝ๐’œ1โˆ—. For cross-entropy and negative log-likelihood losses, ๐‡1โ‰ˆ๐…1 near a local minimum (the Bartlett identity). The parameter shift term is therefore bounded by โ€–๐œฝ๐’œ2โˆ—โˆ’๐œฝ๐’œ1โˆ—โ€–๐…12/2. Taking the square root and using the concavity of the square root function, this is bounded by โ€–๐œฝ๐’œ2โˆ—โˆ’๐œฝ๐’œ1โˆ—โ€–๐…1 when the norm is at most 2.

For the structural shift term, we define the architectural divergence (ARCH Divergence DEF)๐’Ÿ(๐’œ1,๐’œ2)=sup๐œฝโก|โ„’1(๐œฝ,๐’œ2)โˆ’โ„’1(๐œฝ,๐’œ1)|, which captures the maximum loss difference attributable purely to structural change, holding parameters fixed. Combining both terms yields the claimed bound.

Remark 6.

The bound in Proposition 8 reveals two independent sources of forgetting. The first term, โ€–๐œฝ๐’œ2โˆ—โˆ’๐œฝ๐’œ1โˆ—โ€–๐…1, is the classical parameter-level forgetting studied in Elastic Weight Consolidation [6] and related methods. The second term, ๐’Ÿ(๐’œ1,๐’œ2), is a purely structural contribution that has no analogue in fixed-architecture continual learning. This structural term explains why architecture changes can be more disruptive than simple fine-tuning: even if the parameters remain identical, changing the computational graph through which they operate can alter the function computed by the network.

The bound suggests a practical strategy: when modifying an architecture, minimise both terms simultaneously. The parameter term can be controlled by regularisation (EWC, online EWC, synaptic intelligence). The structural term can be controlled by restricting architecture changes to additions rather than modifications or deletions, since adding a new module with zero-initialised weights yields ๐’Ÿ(๐’œ1,๐’œ2)=0 initially. This observation motivates the โ€œgrow, don't replaceโ€ principle that we will encounter repeatedly in subsequent sections.

What to Remember, What to Forget

Not all forgetting is catastrophic. In fact, some forgetting is desirable. A model that remembers every detail of its training data is overfitting; a model that retains outdated information about a changed world is making incorrect predictions. The challenge is not to prevent all forgetting but to control what is forgotten and when.

This reframing transforms forgetting from a bug into an optimisation problem: given a set of tasks and a limited budget of model capacity, which knowledge should be retained, which should be discarded, and which should be restructured into a more compact representation? The answer depends on a hierarchy of objectives, ordered from most to least important.

  1. Human preferences (alignment objectives). Certain behaviours must be preserved regardless of efficiency considerations. Safety constraints, ethical boundaries, and user preferences define inviolable requirements. Knowledge that supports these objectives must be protected at all costs.

  2. Task performance (validation metrics). Among the remaining knowledge, priority goes to information that contributes most to performance on current and anticipated future tasks. Performance is measured on validation sets that represent the deployment distribution.

  3. Efficiency (latency, memory, energy). Knowledge that can be preserved with fewer parameters or cheaper computations is preferred. This objective motivates compression and distillation as forms of โ€œproductive forgetting.โ€

  4. Simplicity (Occam's razor). All else being equal, simpler representations are preferred. Complexity that does not contribute to performance or safety is a liability, because it increases the attack surface for adversarial inputs and makes the model harder to interpret.

To operationalise this hierarchy, we need a way to measure how important each piece of knowledge is.

Definition 10 (Knowledge Importance Score).

For each parameter ฮธi (or, more generally, each module m) in a network, the knowledge importance score is (Importance Score)ฮฉi=โˆ‘tโˆˆ๐’ฏwtโ‹…(โˆ‚โ„’tโˆ‚ฮธi)2, where ๐’ฏ is the set of tasks, wt>0 is a weight reflecting the importance of task t in the hierarchy above, and โ„’t is the loss on task t. The score ฮฉi measures how sensitive the aggregate performance is to changes in ฮธi: parameters with high ฮฉi are critical for multiple important tasks and should be protected; parameters with low ฮฉi can be safely modified or pruned.

The importance score connects directly to the Fisher information matrix. Recall that the diagonal of the empirical Fisher ๐…^ for task t has entries F^ii(t)=๐”ผ(๐’™,๐’š)โˆผ๐’Ÿt[(โˆ‚โ„’t/โˆ‚ฮธi)2]. Thus the importance score is a weighted sum of Fisher diagonals: (Importance Fisher)ฮฉi=โˆ‘tโˆˆ๐’ฏwtโ‹…F^ii(t).

This reveals a deep connection between selective forgetting and Elastic Weight Consolidation (EWC) [6], which was developed in the continual learning literature (26). EWC adds a quadratic penalty ฮป2โˆ‘iFii(A)(ฮธiโˆ’ฮธiโˆ—,A)2 to the loss for task B, where Fii(A) is the Fisher diagonal from task A and ฮธiโˆ—,A is the optimal parameter for task A. Through the NAS lens, EWC is protecting the architecture: it ensures that the parameters most important for task A's computations remain close to their optimal values, thereby preserving the functional structure of the network even as new task knowledge is incorporated.

The connection to bilevel optimisation is immediate. In a bilevel NAS framework, the outer objective decides which knowledge to protect by setting the task weights wt. The inner objective then optimises the parameters subject to these protection constraints. The outer objective can be viewed as a meta-learner that allocates the network's limited capacity across tasks, deciding which tasks deserve dedicated architectural resources and which can share.

Decision tree for selective forgetting. Each module is evaluated against a hierarchy of criteria: safety-critical modules are always retained, high-importance modules are retained with regularisation, modules amenable to compression are restructured, and remaining low-importance modules are pruned. The thresholds ฯ„s, ฯ„ฮฉ, and ฯ are hyperparameters set by the outer optimisation loop.

fig:nas:forgetting-decision-tree illustrates the decision process for each module. The tree encodes the priority hierarchy: a module that is safety-critical is retained regardless of its efficiency, while a module that is neither safety-critical nor important for any task can be safely pruned. Between these extremes lies the interesting territory of restructuring: modules that contain useful knowledge but in an inefficient form can be distilled into smaller, faster components.

The decision tree is not merely a heuristic; it can be formalised as a constrained optimisation problem. Let smโˆˆ{0,1} indicate whether module m is retained (sm=1) or pruned (sm=0), and let rmโˆˆ[0,1] indicate the compression ratio applied to retained modules. The selective forgetting problem is then (Selective Forgetting OPT)min๐’”,๐’“โกโˆ‘m(1โˆ’sm)โ‹…ฮฉm+ฮปโˆ‘msmโ‹…C(m,rm)s.t.sm=1โˆ€mโˆˆโ„ณsafe, where C(m,rm) is the computational cost of module m at compression ratio rm, and โ„ณsafe is the set of safety-critical modules. The first term penalises forgetting important knowledge; the second penalises computational cost. The constraint ensures that safety-critical modules are never pruned.

Bilevel Optimisation: Who Decides the Architecture?

The selective forgetting framework raises a meta-question: who decides the task weights wt, the thresholds ฯ„s and ฯ„ฮฉ, and the trade-off parameter ฮป? In classical machine learning, these are hyperparameters tuned by the practitioner. But in an adaptive system, they should themselves be learned. This leads naturally to a bilevel optimisation structure.

The bilevel formulation of NAS separates concerns into two nested loops. The inner loop optimises the network's weights ๐œฝ for a given architecture ๐’œ, minimising the training loss: (Inner LOOP)๐œฝโˆ—(๐’œ)=argโ€‰min๐œฝโกโ„’train(๐œฝ,๐’œ). The outer loop optimises the architecture ๐’œ (and possibly the meta-parameters wt, ฮป, etc.) to minimise a validation loss: (Outer LOOP)๐’œโˆ—=argโ€‰min๐’œโˆˆ๐’ฎโกโ„’val(๐œฝโˆ—(๐’œ),๐’œ). Together, these form the bilevel optimisation problem (Bilevel)min๐’œโˆˆ๐’ฎโกโ„’val(๐œฝโˆ—(๐’œ),๐’œ)s.t.๐œฝโˆ—(๐’œ)=argโ€‰min๐œฝโกโ„’train(๐œฝ,๐’œ).

This structure is both natural and problematic. It is natural because it separates the โ€œwhat to computeโ€ question (architecture) from the โ€œhow to compute itโ€ question (weights). It is problematic because the inner optimisation is itself an expensive procedure: fully training a network for each candidate architecture is computationally prohibitive.

The breakthrough insight of DARTS (Differentiable Architecture Search) [25] was to approximate the inner optimisation with a single gradient step, turning the bilevel problem into a tractable alternating optimisation. At each iteration, DARTS performs one gradient step on ๐œฝ using โ„’train and one gradient step on the architecture parameters ๐œถ using โ„’val. The convergence properties of this procedure are characterised by the following theorem.

Theorem 3 (Bilevel NAS Convergence).

Suppose the inner problem min๐œฝโกโ„’train(๐œฝ,๐’œ) is ฮผ-strongly convex in ๐œฝ for each ๐’œ, and the outer objective โ„’val(๐œฝโˆ—(๐’œ),๐’œ) is L-Lipschitz continuous in ๐’œ. Then the bilevel NAS procedure with inner learning rate ฮทin and outer learning rate ฮทout, after T outer iterations each with K inner steps, satisfies (Bilevel Convergence)โ„’val(๐’œT)โˆ’โ„’val(๐’œโˆ—)โ‰คO(1T+ฮทinL). The first term is the outer optimisation error, which decreases with the number of outer iterations. The second term is the inner approximation error, arising from the fact that we solve the inner problem only approximately.

Proof.

The proof proceeds in two stages. First, we bound the error introduced by the approximate inner solution. Second, we apply standard results from online convex optimisation to the outer loop.

Stage 1: Inner approximation error. After K steps of gradient descent with learning rate ฮทin on the ฮผ-strongly convex inner problem, the parameter iterate ๐œฝK satisfies (see, e.g., [12]) (Inner Error)โ€–๐œฝKโˆ’๐œฝโˆ—(๐’œ)โ€–2โ‰ค(1โˆ’ฮทinฮผ)Kโ€–๐œฝ0โˆ’๐œฝโˆ—(๐’œ)โ€–2. Let ฮดK=โ€–๐œฝKโˆ’๐œฝโˆ—(๐’œ)โ€– denote the inner approximation gap. By the Lipschitz continuity of โ„’val with respect to ๐œฝ (with constant Lฮธ), we have (VAL Inner Error)|โ„’val(๐œฝK,๐’œ)โˆ’โ„’val(๐œฝโˆ—(๐’œ),๐’œ)|โ‰คLฮธโ‹…ฮดK. For a single inner step (K=1), the error is ฮด1=O(ฮทin), giving an inner approximation error of O(ฮทinLฮธ).

Stage 2: Outer optimisation. We treat the outer loop as an instance of online gradient descent on the function โ„’~val(๐’œ)=โ„’val(๐œฝK(๐’œ),๐’œ). Under the Lipschitz assumption, the standard regret bound for online gradient descent with learning rate ฮทout=O(1/T) gives (Outer Regret)1Tโˆ‘t=1Tโ„’~val(๐’œt)โˆ’โ„’~val(๐’œโˆ—)โ‰คO(1T). Combining the inner approximation error with the outer regret bound, and noting that โ„’~val(๐’œโˆ—)โ‰คโ„’val(๐’œโˆ—)+O(ฮทinL), we obtain the claimed bound .

The theorem reveals a fundamental tension in bilevel NAS: reducing the inner approximation error requires either more inner steps (increasing cost) or a smaller inner learning rate (slowing convergence). The outer optimisation error decreases with T, but each outer step requires at least one inner step. The total cost is therefore O(Kโ‹…T) gradient evaluations. For the DARTS approximation (K=1), the cost is O(T) but the inner approximation error is O(ฮทinL), which does not vanish. This non-vanishing bias is one of the known failure modes of DARTS and motivates more sophisticated bilevel solvers.

When multiple objectives conflict, the bilevel framework naturally accommodates multi-objective optimisation through Pareto optimality.

Remark 7.

Consider two architectures: ๐’œ1 achieves 95% accuracy with 100ms latency, while ๐’œ2 achieves 90% accuracy with 50ms latency. Neither dominates the other: ๐’œ1 is better on accuracy, ๐’œ2 is better on latency. Both lie on the Pareto frontier, the set of all architectures for which no single objective can be improved without degrading another. The outer loop of bilevel NAS can be configured to search for architectures on this frontier by scalarising the objectives: โ„’outer=ฮฒโ‹…โ„’accuracy+(1โˆ’ฮฒ)โ‹…โ„’latency, where ฮฒโˆˆ[0,1] traces the frontier as it varies. Alternatively, evolutionary methods can maintain a population of non-dominated solutions.

The bilevel framework also connects to reinforcement learning from human feedback (RLHF), as developed in 25. In RLHF, a reward model rฯ•(๐’™,๐’š) scores model outputs based on human preferences. This reward model can serve as the outer objective in a bilevel NAS framework: the inner loop trains the model to generate outputs, and the outer loop modifies the architecture to maximise the reward model's score. In this view, RLHF reward models provide architecture-level feedback, not just weight-level feedback. The distinction is subtle but important: a reward model that consistently penalises certain types of errors may indicate that the architecture lacks the representational capacity to avoid those errors, suggesting that structural changes (not just weight updates) are needed.

Are Current LLMs Good Enough?

The preceding analysis raises a provocative question about the dominant paradigm in modern AI. Current large language models (LLMs) are deployed with fixed architectures: the number of layers, the number of attention heads, the hidden dimension, the vocabulary size, and the positional encoding scheme are all determined before training begins and remain immutable throughout training and deployment. Is this a limitation?

The evidence suggests that it is. Consider the phenomenon of attention decay in long conversations. As a conversation grows, the context window fills, and information from earlier turns receives progressively less attention. This is not merely a computational issue (longer contexts require more compute); it is an architectural issue. The attention mechanism allocates a fixed number of heads with fixed key-query dimensions across all parts of the input, regardless of the complexity or importance of each segment.

Insight.

Current LLMs have a fixed architecture. They cannot grow new attention heads for new domains, add memory modules for unfamiliar tasks, or prune irrelevant pathways during inference. The brain, by contrast, adapts its architecture continuously: neurons that fire together wire together, unused synapses are pruned, and new dendritic spines form in response to novel stimuli. Is the fixed architecture of LLMs a fundamental limitation, or can adaptive attention and dynamic computation solve these problems within the existing paradigm? The answer may determine the trajectory of AI for the next decade.

Several concrete failure modes illustrate the limitations of fixed architectures. First, uniform compute allocation: a fixed transformer spends the same number of floating-point operations on the sentence โ€œThe cat sat on the matโ€ as on a complex mathematical proof, despite the vastly different computational requirements. Mixture-of-experts (MoE) models partially address this by routing tokens to specialised experts, but the set of experts is still fixed at training time.

Second, fixed context windows: the positional encoding scheme and attention pattern are determined at training time and cannot adapt to inputs that require longer-range dependencies. Techniques like RoPE extrapolation and sliding-window attention mitigate this, but they are engineering workarounds rather than architectural solutions.

Third, frozen specialisation: a model trained primarily on English text cannot dynamically allocate more capacity to Mandarin when deployed in a Mandarin-speaking region. Fine-tuning helps, but it modifies the entire model rather than adding targeted capacity, risking catastrophic forgetting of English capabilities.

To make the comparison concrete, Table 4 contrasts the two paradigms across several dimensions.

PropertyFixed ArchitectureAdaptive Architecture
Capacity allocationFixed at design time; same compute for easy and hard inputsDynamic; allocate more compute to harder inputs, less to easy ones
[4pt] Domain expertiseShared across all domains; no specialisation possible after trainingSpecialised modules can be grown for new domains; experts activated on demand
[4pt] Memory usageConstant regardless of task; entire model loaded even for simple queriesVariable; load only relevant modules, offload unused ones
[4pt] Deployment complexitySimple: one model binary, one inference engineComplex: model surgery, dynamic loading, compatibility management
[4pt] Theoretical guaranteesWell-understood: PAC bounds, generalisation theory, scaling lawsNascent: few convergence guarantees, limited scaling theory
[4pt] Continual learningRequires full retraining or careful fine-tuning with forgetting mitigationNatural: grow new modules for new tasks, protect existing ones
Fixed versus adaptive architecture paradigms. The fixed paradigm offers simplicity and well-understood theory at the cost of flexibility. The adaptive paradigm offers dynamic resource allocation and continuous improvement at the cost of deployment complexity and weaker theoretical guarantees.

The table reveals that the choice between fixed and adaptive architectures is not a simple one. Fixed architectures dominate current practice for good reasons: they are simple to deploy, well-understood theoretically, and benefit from years of engineering optimisation. But as models grow larger and are expected to handle increasingly diverse tasks, the limitations of fixed architectures become more apparent.

The forgetting-adaptation tradeoff is central to this comparison. A fixed architecture has no structural plasticity (ฮจ=0 in the sense of Definition 9), meaning that all adaptation must occur in parameter space. An adaptive architecture can, in principle, achieve ฮจโ‰ซ0 by growing new modules for new tasks, but this comes at the cost of increased complexity in both training and deployment.

The question is not whether adaptive architectures are theoretically superior (they are, by construction, since they contain fixed architectures as a special case) but whether the practical challenges of adaptive architectures can be overcome.

To sharpen this point, consider the computational cost of adaptation. A fixed architecture can be deployed as a single optimised binary with well-understood latency characteristics. An adaptive architecture requires infrastructure for model surgery (adding, removing, or modifying modules at runtime), dynamic loading (bringing specialised modules into memory on demand), and compatibility management (ensuring that new modules work correctly with existing ones). These engineering challenges are substantial but not insurmountable: modern serving frameworks already support dynamic batching, model parallelism, and mixture-of-experts routing, all of which can be viewed as lightweight forms of architectural adaptation.

Proposition 9 (Capacity-Plasticity Tradeoff).

For a modular architecture ๐’œ with M modules, each with d parameters, the architecture plasticity (Definition 9) satisfies (Capacity Plasticity)ฮจ(๐’œ)โ‰คMโ‹…โŒŠdโ‹…logโก(1/ฯต)๐”ผt[๐–จโก(๐œฝm;๐’Ÿt)]โŒ‹, where ๐–จโก(๐œฝm;๐’Ÿt) is the mutual information between module m's parameters and the data of task t, and ฯต is the forgetting tolerance. The bound shows that plasticity grows linearly with the number of modules M (more modules means more capacity for new tasks) and logarithmically with the tolerance 1/ฯต (stricter tolerance demands more capacity per task).

Proof sketch.

Each module can accommodate at most โŒŠdlogโก(1/ฯต)/๐–จโก(๐œฝm;๐’Ÿt)โŒ‹ tasks before its parameters are fully utilised, by a rate-distortion argument: the d parameters encode at most dlogโก(1/ฯต) bits of information about task data when the forgetting tolerance is ฯต, and each task requires at least ๐–จโก(๐œฝm;๐’Ÿt) bits. Summing over M independent modules yields the bound.

The proposition formalises the intuition that modular architectures are more plastic than monolithic ones: by increasing M (adding more modules), we can linearly increase the number of tasks the architecture can accommodate. This is the formal justification for the โ€œgrow, don't replaceโ€ strategy mentioned after Proposition 8.

The remainder of this chapter develops the mathematical and algorithmic tools needed to realise adaptive architectures in practice.

The Landscape of Search Spaces

Before we can search, we must define what we are searching through. Every detective needs a map of the territory: the streets, the buildings, the dead ends, and the shortcuts. In neural architecture search, the territory is the search space, the set of all candidate architectures that the search procedure is permitted to consider. The design of this search space is arguably the most consequential decision in any NAS pipeline, because it determines both the quality of the best discoverable architecture and the tractability of finding it.

A search space that is too small may exclude the optimal architecture entirely. A search space that is too large may be intractable to explore, even with sophisticated search algorithms. The art of NAS lies in designing search spaces that are large enough to contain excellent architectures but structured enough to be navigable.

What Can Be Searched?

We begin with a formal definition.

Definition 11 (Search Space).

A search space for neural architecture search is a set ๐’ฎ of candidate architectures, defined by a tuple (๐’ช,๐’ข,๐’ž) where:

  • ๐’ช is the set of allowable operations: the computational primitives from which architectures are built. Common operations include convolutions of various kernel sizes (3ร—3, 5ร—5, 7ร—7), dilated convolutions, depthwise separable convolutions, self-attention layers, pooling operations (max, average), skip (identity) connections, normalisation layers (batch norm, layer norm, group norm), and the zero operation (no connection).

  • ๐’ข is the set of allowable connectivity patterns: the ways in which operations can be composed. This includes directed acyclic graphs (DAGs) of bounded size, chain (sequential) architectures, residual connections, and dense connections.

  • ๐’ž is the set of macro-structural constraints: global properties that all candidate architectures must satisfy. These include bounds on depth (number of layers), bounds on width (channels per layer), total parameter budget, total FLOP budget, and memory constraints.

An architecture ๐’œโˆˆ๐’ฎ is a specific instantiation: a choice of operation for each edge and a connectivity pattern from ๐’ข satisfying all constraints in ๐’ž.

The definition is deliberately general. In practice, search spaces are structured in specific ways that reflect assumptions about what good architectures look like. Three major paradigms have emerged in the NAS literature.

Cell-based search spaces.

Pioneered by NASNet [51], cell-based search spaces decompose the network into small repeatable units called cells. Each cell is a small directed acyclic graph with a fixed number of input nodes, intermediate nodes, and output nodes. The search procedure determines the operations on each edge and the connectivity pattern within each cell. The complete network is then built by stacking copies of the discovered cell in a predetermined pattern.

Cell-based spaces have a crucial advantage: the search is conducted on a small object (the cell), but the resulting architecture can be scaled to arbitrary depth by stacking more cells. This separation of micro-architecture (cell design) from macro-architecture (stacking pattern) dramatically reduces the search cost. The disadvantage is that it imposes homogeneity: every cell in the network has the same structure, which may not be optimal. Different layers of a network may benefit from different operations, but a cell-based space cannot express this heterogeneity.

Typically, two types of cells are searched: normal cells that preserve spatial dimensions and reduction cells that reduce spatial dimensions (typically by a factor of 2). The macro-architecture specifies where normal and reduction cells are placed.

Layer-based search spaces.

Layer-based search spaces allow heterogeneous layers: each layer can have a different operation, different width, and different connectivity. This is more expressive than cell-based spaces but also more expensive, since the number of decisions scales with the depth of the network rather than the (fixed) size of a cell.

MnasNet [33] and EfficientNet [35] use layer-based search, searching over the type, kernel size, and expansion ratio of each layer independently. The increased expressiveness allows these methods to discover architectures with heterogeneous structure, for instance networks that use larger kernels in early layers (for capturing coarse features) and smaller kernels in later layers (for fine-grained features).

Hierarchical search spaces.

Hierarchical search spaces [74] introduce multiple levels of structure. At the lowest level, primitive operations are composed into motifs. At the next level, motifs are composed into cells. At the highest level, cells are composed into the complete network. Each level is searched separately, and the results are composed to build the final architecture.

Hierarchical spaces offer a middle ground between cell-based and layer-based approaches. They allow heterogeneity at the motif level while maintaining structural regularity at the cell and network levels. The main challenge is defining the interfaces between levels: how motifs connect to form cells, and how cells connect to form networks.

Three-level hierarchy of a NAS search space. Micro level: primitive operations (convolutions, pooling, skip connections, zero) that can be assigned to edges of a cell DAG. Meso level: cell types (normal and reduction) defined by choosing operations and connectivity patterns from the micro level. Macro level: the overall network topology, defined by the stacking pattern of cells and the placement of reduction cells.

fig:nas:search-space-hierarchy illustrates the three-level hierarchy. The micro level defines the vocabulary of operations; the meso level defines the grammar of cells; the macro level defines the syntax of complete networks. This linguistic analogy is instructive: just as a language's expressiveness depends on both its vocabulary and its grammar, the expressiveness of a search space depends on both the available operations and the ways they can be composed.

Type|๐’ฎ|ExpressivenessSearch CostNotable Methods
Cell-basedโˆผ1018โ€“1029Medium0.5โ€“4 GPU-daysNASNet, DARTS, ENAS
[3pt] Layer-basedโˆผ1030โ€“1050High2โ€“20 GPU-daysMnasNet, EfficientNet, OFA
[3pt] Hierarchicalโˆผ1020โ€“1040High1โ€“10 GPU-daysHierarchical NAS, Auto-DeepLab
[3pt] UnconstrainedโˆžMaximal>100 GPU-daysNAS-RL (original), random wiring
Comparison of search space types. The size |๐’ฎ| is approximate and depends on specific configurations. Search cost is measured in GPU-days for a typical image classification benchmark.

Table 5 summarises the key properties of each search space type. The trend is clear: more expressive search spaces are more expensive to search. The cell-based paradigm achieves a favourable trade-off by restricting the search to small, repeatable units, while unconstrained search over arbitrary graph structures remains prohibitively expensive for all but the most well-resourced research groups.

Remark 8.

The choice of search space encodes strong inductive biases. A cell-based space assumes that the optimal architecture is composed of repeated homogeneous units. A layer-based space assumes that layers can be characterised by a small number of discrete choices (operation type, kernel size, expansion ratio). These assumptions are not neutral: they reflect the designer's prior beliefs about what good architectures look like, and they can systematically exclude architectures that violate those beliefs. This is the bias-variance tradeoff of architecture design: a constrained search space has low variance (search is reliable) but potentially high bias (the optimal architecture may be excluded).

The Search Space for Generative Models

The search spaces described above were developed primarily for discriminative tasks, especially image classification. Generative models introduce additional considerations that fundamentally alter which operations and connectivity patterns are relevant.

The search space for a generative model depends on the generative paradigm.

Diffusion models.

The dominant architecture for diffusion models is the U-Net [75], a symmetric encoder-decoder with skip connections at each resolution level. The NAS search space for diffusion models must include: the number and type of residual blocks at each resolution level, the placement and configuration of self-attention layers (which resolutions receive attention, how many heads, what key/query dimensions), the type of normalisation (group norm, layer norm, adaptive group norm), the mechanism for conditioning on the diffusion timestep (additive, multiplicative, adaptive normalisation), and the design of skip connections (simple concatenation, learned gating, attention-based fusion).

The U-Net structure itself imposes a strong prior: the encoder-decoder symmetry and the multi-resolution skip connections are taken as given, and only the internal block designs are searched. Breaking this prior, for instance by searching over asymmetric encoder-decoder architectures, dramatically expands the search space but may discover architectures that outperform the standard U-Net.

Large language models.

The transformer architecture [76] offers a different set of searchable dimensions: the number of attention heads and their dimensions (few large heads vs. many small heads), the ratio of feed-forward network (FFN) hidden dimension to model dimension, the total depth (number of transformer blocks), the attention pattern (full quadratic attention, sparse attention with fixed patterns, linear attention approximations), the positional encoding scheme (absolute, relative, rotary, ALiBi), and the normalisation placement (pre-norm vs. post-norm vs. sandwich norm).

For LLMs, the search space is further complicated by the need to maintain language modelling coherence throughout the architecture. Unlike image classification, where each layer transforms spatial features independently, language modelling requires that information flows coherently from early context to late predictions. An architecture that is optimal for short sequences may perform poorly on long sequences, and vice versa.

Generative adversarial networks.

GANs require searching two architectures simultaneously: the generator and the discriminator. The generator's search space includes the type and arrangement of upsampling blocks (transposed convolution, bilinear upsampling followed by convolution, nearest-neighbour upsampling, sub-pixel convolution), normalisation schemes (batch norm, spectral norm, instance norm, adaptive instance norm), and non-linearities. The discriminator's search space mirrors the generator's but with downsampling blocks and classification-oriented design.

The adversarial training dynamic introduces a unique constraint: the generator and discriminator architectures must be balanced. A generator that is too powerful relative to the discriminator leads to mode collapse; a discriminator that is too powerful leads to vanishing gradients for the generator. This balance constraint couples the two search spaces in ways that have no analogue in discriminative NAS.

To formalise the structure common to all generative NAS search spaces, we introduce the following definition.

Definition 12 (Generative Architecture DAG).

A generative architecture is a directed acyclic graph G=(V,E,ฯƒ) where:

  • V=VinโˆชVmidโˆชVout is a partitioned set of nodes. Input nodes Vin receive data (noise vectors, text tokens, conditioning signals). Intermediate nodes Vmid represent internal tensor states. Output nodes Vout produce generated samples (images, audio, text tokens).

  • EโІVร—V is a set of directed edges representing data flow, with the constraint that no directed cycle exists (the graph is acyclic).

  • ฯƒ:Eโ†’๐’ช assigns an operation from the operation set ๐’ช to each edge. The operation ฯƒ(e) transforms the tensor at the source node to produce (part of) the tensor at the destination node.

For nodes with multiple incoming edges, the incoming tensors are aggregated by a fixed aggregation function (typically element-wise addition or channel-wise concatenation).

The generative architecture DAG provides a common language for describing architectures across different generative paradigms. A U-Net for diffusion is a specific instantiation with a particular connectivity pattern (encoder-decoder with skip connections) and specific operations (residual blocks, attention layers). A transformer for language modelling is a chain DAG with self-attention and FFN operations on each edge. A GAN generator is a DAG with upsampling operations.

Remark 9.

The search space must be rich enough to contain good architectures but constrained enough to be searchable. Too rich and the search is intractable: the number of candidate architectures grows exponentially with the number of nodes and operations, and even sophisticated search algorithms cannot explore more than a tiny fraction of the space. Too constrained and the optimal architecture may lie outside the space entirely. This is the bias-variance tradeoff of architecture design itself: a constrained space has low search variance (the search reliably finds a good architecture within the space) but potentially high bias (the space may not contain the globally optimal architecture).

The design of effective search spaces for generative models remains an active area of research. Unlike discriminative tasks, where decades of manual architecture design have revealed strong structural priors (residual connections, batch normalisation, bottleneck blocks), the generative modelling landscape is younger and less well explored. This means that NAS for generative models has more to discover but also less prior knowledge to guide the search.

To illustrate the differences between generative and discriminative search spaces, consider the following proposition.

Proposition 10 (Generative Search Space Lower Bound).

Let ๐’ฎdisc be a cell-based search space designed for discriminative image classification with K operations and N nodes. A search space ๐’ฎgen for a conditional generative model (e.g., a class-conditional diffusion model) that includes all architectures in ๐’ฎdisc plus conditioning pathways must satisfy (GEN Search Lower)|๐’ฎgen|โ‰ฅ|๐’ฎdisc|โ‹…CN, where Cโ‰ฅ2 is the number of conditioning mechanisms per node (e.g., additive conditioning, multiplicative conditioning, adaptive normalisation, cross-attention). The multiplicative factor CN arises because each intermediate node independently chooses how to incorporate conditioning information.

Proof.

Each of the N intermediate nodes must process both the input tensor and the conditioning signal. The choice of conditioning mechanism at each node is independent of the operation choices on the edges, giving C additional choices per node. By the independence of these choices across nodes, the total number of architectures is at least |๐’ฎdisc|โ‹…CN.

This proposition explains why NAS for generative models is inherently harder than NAS for discriminative models: the search space is exponentially larger due to the additional dimension of conditioning mechanism design. It also highlights the importance of carefully constraining the conditioning search space to maintain tractability.

The Mathematical Structure of Architecture Spaces

Architecture spaces are combinatorial objects with rich mathematical structure. Understanding this structure reveals why some search methods work brilliantly and others fail spectacularly. It explains why gradient-based methods can be applied to inherently discrete objects, why weight sharing enables practical NAS, and where the fundamental limits of efficient architecture search lie.

In this section, we develop the mathematical foundations that underpin modern NAS algorithms. We begin with the combinatorial structure of architecture spaces, proceed to continuous relaxations that enable gradient-based search, and conclude with the supernet paradigm that makes one-shot architecture evaluation possible.

Architecture Spaces as Combinatorial Objects

The first question about any search space is: how large is it? The answer, as we shall see, is typically astronomically large, making exhaustive search impossible and motivating the sophisticated algorithms developed in subsequent sections.

Consider a cell-based search space of the type used in DARTS [25]. A cell is a directed acyclic graph with N intermediate nodes, plus two input nodes (representing the outputs of the two preceding cells) and one output node (the concatenation of all intermediate nodes). Each intermediate node i receives input from all preceding nodes (both input nodes and intermediate nodes 1,โ€ฆ,iโˆ’1) via separate edges. Each edge carries one of K candidate operations.

Proposition 11 (Search Space Cardinality).

For a cell-based search space with N intermediate nodes and K candidate operations per edge, where intermediate node i (i=2,โ€ฆ,N+1, numbering from the first input node as node 0 and the second input node as node 1) receives input from all preceding nodes {0,1,โ€ฆ,iโˆ’1}, the total number of distinct architectures is (Search Space CARD)|๐’ฎ|=โˆi=2N+1Ki=Kโˆ‘i=2N+1i=K(N+2)(N+1)2โˆ’1.

Proof.

Intermediate node i (for i=2,โ€ฆ,N+1 in our numbering) has exactly i incoming edges, one from each of nodes 0,1,โ€ฆ,iโˆ’1. Each edge independently takes one of K operations, giving Ki choices for node i. Since the choices for different nodes are independent, the total count is |๐’ฎ|=โˆi=2N+1Ki=Kโˆ‘i=2N+1i. The exponent is โˆ‘i=2N+1i=(โˆ‘i=0N+1i)โˆ’0โˆ’1=(N+1)(N+2)2โˆ’1.

To appreciate the scale, consider the standard DARTS search space with N=7 intermediate nodes and K=7 candidate operations (3ร—3 separable convolution, 5ร—5 separable convolution, 3ร—3 dilated convolution, 5ร—5 dilated convolution, 3ร—3 max pooling, 3ร—3 average pooling, and skip connection). The exponent is (7+2)(7+1)/2โˆ’1=9โ‹…8/2โˆ’1=35, giving |๐’ฎ|=735โ‰ˆ3.8ร—1029. This is roughly the number of atoms in a human body. Evaluating each architecture for even one second would require more time than the age of the universe. Exhaustive search is out of the question.

But the raw cardinality overstates the true difficulty of the problem, because many distinct DAGs encode the same function. If two edges both carry the zero operation (no computation), swapping them changes the DAG but not the function. More generally, the symmetries of the cell graph create equivalence classes of architectures that compute identical functions.

Proposition 12 (Redundancy Bound).

The number of functionally distinct architectures is at most (Redundancy Bound)|๐’ฎeff|โ‰ค|๐’ฎ||Autโก(G)|, where Autโก(G) is the automorphism group of the cell graph G, consisting of all permutations of intermediate nodes that preserve the edge structure and the identity of input/output nodes.

Proof.

Two architectures ๐’œ and ๐’œโ€ฒ are functionally equivalent if there exists a graph automorphism ฯ€โˆˆAutโก(G) such that the operation assigned to each edge in ๐’œโ€ฒ equals the operation assigned to the corresponding edge under ฯ€ in ๐’œ. The orbits of ๐’ฎ under the action of Autโก(G) partition the search space into equivalence classes. By the orbit-stabiliser theorem, the number of orbits is at most |๐’ฎ|/|Autโก(G)|.

Remark 10.

In practice, the redundancy is even greater than the automorphism bound suggests, because operations themselves can introduce additional symmetries. For instance, if K includes both โ€œ3ร—3 conv followed by ReLUโ€ and โ€œ3ร—3 conv followed by identityโ€ as separate operations, two architectures differing only in this choice may compute nearly identical functions (since ReLU is close to the identity for positive inputs). Continuous relaxations, discussed next, provide a different and complementary approach to handling this redundancy.

The combinatorial explosion of architecture spaces motivates the central algorithmic challenge of NAS: how to identify good architectures without evaluating more than a tiny fraction of the search space. To put the scale in perspective: if each architecture evaluation took one millisecond, exhaustively evaluating a DARTS search space (735 candidates) would require approximately 1.2ร—1019 years, which is roughly 900 million times the current age of the universe. Even sampling a mere 10โˆ’20 fraction of the space would take longer than a human lifetime.

The impossibility of exhaustive search means that NAS algorithms must rely on structural properties of the search space to guide their exploration. Two key properties enable efficient search: the smoothness of the loss landscape (nearby architectures tend to have similar performance) and the low intrinsic dimensionality of the set of high-performing architectures (good architectures cluster in a small region of the space). Both properties are empirical observations rather than theoretical guarantees, but they hold consistently across many search spaces and tasks.

The next two subsections develop two key ideas that address this challenge: continuous relaxations (which enable gradient-based search) and supernets (which enable amortised evaluation).

Continuous Relaxations

The architecture search spaces defined above are fundamentally discrete: an architecture is a specific assignment of operations to edges, and the set of such assignments is finite. Discrete optimisation over combinatorial spaces is, in general, NP-hard. The breakthrough that unlocked efficient NAS was the observation that discrete architecture choices can be relaxed into continuous variables, enabling the use of gradient-based optimisation.

The key idea is simple yet powerful: instead of making a hard choice of one operation per edge, allow a soft mixture of all operations and optimise the mixing weights.

Definition 13 (Architecture Parameters).

Let ๐’ฎ=(๐’ช,๐’ข,๐’ž) be a search space with |E| edges and K candidate operations per edge. The architecture parameters are continuous variables ๐œถโˆˆโ„|E|ร—Kโก, where ฮฑe,k represents the strength (or preference) of operation k on edge e. The discrete architecture is recovered by selecting the dominant operation on each edge: (ARCH Param Discrete)keโˆ—=argโ€‰maxkโˆˆ{1,โ€ฆ,K}โกฮฑe,kforย eachย edgeย eโˆˆE.

The continuous relaxation replaces the hard operation selection with a soft weighted combination. For an edge (i,j) connecting nodes i and j, the relaxed operation is (Softmax Relaxation)oโ€พ(i,j)(๐’™)=โˆ‘k=1Kexpโก(ฮฑk(i,j))โˆ‘kโ€ฒ=1Kexpโก(ฮฑkโ€ฒ(i,j))ok(๐’™), where ok(๐’™) is the output of operation k applied to input ๐’™. The softmax function ensures that the weights are positive and sum to one, so the relaxed operation is a convex combination of all candidate operations.

When the architecture parameters ๐œถ are โ€œpeakedโ€ (one ฮฑe,k is much larger than the others), the softmax concentrates nearly all weight on a single operation, and the relaxed operation closely approximates the discrete selection. When ๐œถ is โ€œflatโ€ (all ฮฑe,k are similar), the relaxed operation is a uniform mixture, and the behaviour is far from any single discrete architecture.

This observation leads to a natural question: how well does the continuous relaxation approximate the discrete problem?

Proposition 13 (Relaxation Gap).

Let ๐’œdisc(๐œถ) denote the discrete architecture obtained by selecting keโˆ—=argโ€‰maxkโกฮฑe,k on each edge, and let ๐’œcont(๐œถ) denote the continuous relaxation with softmax weights. Then the loss difference is bounded by (Relaxation GAP)|โ„’(๐’œdisc)โˆ’โ„’(๐’œcont)|โ‰คCโ‹…๐–งโก(softmaxโก(๐œถ)), where C>0 is a constant depending on the Lipschitz continuity of the loss with respect to operation outputs, and ๐–งโก(softmaxโก(๐œถ))=โˆ’โˆ‘eโˆ‘kpe,klogโกpe,k with pe,k=expโก(ฮฑe,k)/โˆ‘kโ€ฒexpโก(ฮฑe,kโ€ฒ) is the entropy of the architecture distribution. When ๐œถ is peaked (low entropy), the relaxation is tight; when ๐œถ is uniform (high entropy), the gap can be large.

Proof.

We bound the difference edge by edge. For edge (i,j), let pk=p(i,j),k be the softmax weight of operation k, and let kโˆ—=argโ€‰maxkโกpk. The relaxed output is oโ€พ(๐’™)=โˆ‘kpkok(๐’™), while the discrete output is okโˆ—(๐’™). Their difference is (EDGE DIFF)oโ€พ(๐’™)โˆ’okโˆ—(๐’™)=โˆ‘kpkok(๐’™)โˆ’okโˆ—(๐’™)=โˆ‘kpk(ok(๐’™)โˆ’okโˆ—(๐’™))=โˆ‘kโ‰ kโˆ—pk(ok(๐’™)โˆ’okโˆ—(๐’™)), since the kโˆ— term vanishes. Taking norms and using the triangle inequality, โ€–oโ€พ(๐’™)โˆ’okโˆ—(๐’™)โ€–โ‰คโˆ‘kโ‰ kโˆ—pkโ€–ok(๐’™)โˆ’okโˆ—(๐’™)โ€–โ‰คMโˆ‘kโ‰ kโˆ—pk=M(1โˆ’pkโˆ—), where M=maxk,kโ€ฒโกโ€–ok(๐’™)โˆ’okโ€ฒ(๐’™)โ€– bounds the maximum operation difference. The quantity 1โˆ’pkโˆ— measures how far the distribution is from a point mass. By Pinsker-type inequalities, 1โˆ’pkโˆ—โ‰ค๐–งโก(๐’‘)/logโก2 when K=2, and more generally 1โˆ’pkโˆ—โ‰ค๐–งโก(๐’‘)/logโกK for K operations.

If the loss โ„’ is L-Lipschitz with respect to each edge's output, the total loss difference across all |E| edges is bounded by Lโ‹…Mโˆ‘e(1โˆ’pe,keโˆ—)โ‰คLMlogโกKโˆ‘e๐–งโก(๐’‘e)=Cโ‹…๐–งโก(softmaxโก(๐œถ)), where C=LM/logโกK and we identify ๐–งโก(softmaxโก(๐œถ))=โˆ‘e๐–งโก(๐’‘e).

The proposition has a clear practical implication: to ensure that the discrete architecture selected from the continuous relaxation performs similarly to the relaxed model, the architecture parameters should be driven toward peaked distributions (low entropy) during training. DARTS achieves this indirectly through optimisation dynamics: as training progresses, the architecture parameters tend to diverge, with one operation per edge accumulating most of the weight. However, this tendency is not guaranteed, and DARTS can suffer from โ€œcollapseโ€: the architecture parameters may concentrate on degenerate operations (especially skip connections) rather than genuinely useful ones.

Key Idea.

The continuous relaxation bridges the gap between the combinatorial world of architecture design and the continuous world of gradient-based optimisation. By replacing hard operation choices with soft mixtures, it transforms the NAS problem from a discrete search over 1029 candidates into a continuous optimisation over |E|ร—K real-valued parameters. The quality of this bridge depends on the entropy of the architecture distribution: low entropy means a tight bridge; high entropy means the continuous and discrete worlds may disagree.

A more principled approach to the continuous-discrete bridge uses the Gumbel-Softmax reparameterisation trick, which enables discrete sampling while maintaining differentiability.

The idea is to add Gumbel noise to the architecture parameters before applying softmax, yielding a sample from a categorical distribution in the forward pass while allowing gradient computation in the backward pass. Specifically, for each edge (i,j) and each operation k, we sample gkโˆผGumbel(0,1) independently and compute (Gumbel Softmax)zk(i,j)=expโก((ฮฑk(i,j)+gk)/ฯ„)โˆ‘kโ€ฒ=1Kexpโก((ฮฑkโ€ฒ(i,j)+gkโ€ฒ)/ฯ„), where gk=โˆ’logโก(โˆ’logโก(uk)) with ukโˆผUniform(0,1) is a sample from the standard Gumbel distribution, and ฯ„>0 is a temperature parameter.

The temperature ฯ„ controls the sharpness of the resulting distribution. As ฯ„โ†’0, the Gumbel-Softmax distribution approaches a one-hot categorical distribution: one zk approaches 1 and the rest approach 0. As ฯ„โ†’โˆž, the distribution approaches uniform: all zk approach 1/K.

Proposition 14 (Gumbel-Softmax Properties).

The Gumbel-Softmax distribution has the following properties:

  1. Correct marginals. ๐”ผ[zk(i,j)]โ†’pk(i,j)=expโก(ฮฑk(i,j))/โˆ‘kโ€ฒexpโก(ฮฑkโ€ฒ(i,j)) as the number of samples grows, regardless of ฯ„.

  2. Discrete limit. As ฯ„โ†’0, ๐’›(i,j)โ†’๐’†kโˆ— where kโˆ—โˆผCategoricalโก(๐’‘(i,j)) and ๐’†kโˆ— is the kโˆ—-th standard basis vector. The sample becomes exactly one-hot.

  3. Differentiability. For any ฯ„>0, the mapping ๐œถโ†ฆ๐’› is differentiable almost everywhere, enabling gradient computation via backpropagation through the sampling process.

  4. Variance. The variance of each zk decreases as ฯ„โ†’0, concentrating the distribution and reducing gradient variance. However, very small ฯ„ leads to near-zero gradients (the โ€œstraight-throughโ€ regime), creating a bias-variance tradeoff in the choice of temperature.

Proof.

Property (1) follows from the Gumbel-Max trick: if kโˆ—=argโ€‰maxkโก(ฮฑk+gk) with gkโˆผiidGumbel(0,1), then Prโก(kโˆ—=k)=expโก(ฮฑk)/โˆ‘kโ€ฒexpโก(ฮฑkโ€ฒ). The Gumbel-Softmax is a continuous relaxation of this argmax, and its expectation converges to the same categorical probabilities.

Property (2) follows from the observation that as ฯ„โ†’0, zk/zkโˆ—=expโก((ฮฑk+gkโˆ’ฮฑkโˆ—โˆ’gkโˆ—)/ฯ„)โ†’0 for all kโ‰ kโˆ— (since ฮฑkโˆ—+gkโˆ—>ฮฑk+gk for kโ‰ kโˆ— almost surely), so zkโˆ—โ†’1 and all other zkโ†’0.

Property (3) is immediate from the composition of smooth functions (exponential, division) applied to the parameters ๐œถ. The Gumbel noise gk does not depend on ๐œถ, so the gradient โˆ‚zk/โˆ‚ฮฑkโ€ฒ exists and is computable.

Property (4) follows from the concentration of the softmax function as ฯ„โ†’0: the distribution places nearly all mass on a single operation, so ๐–ตarโก(zk) approaches that of a Bernoulli random variable with extreme probability, which is near zero.

From discrete to continuous architecture selection. Left: discrete selection picks exactly one operation (conv3ร—3, shown in green) and discards the rest. Middle: softmax relaxation assigns continuous weights pk to all operations; the output is a weighted sum. Right: Gumbel-Softmax adds Gumbel noise and uses a low temperature ฯ„ to produce near-one-hot samples zk, enabling discrete sampling with differentiable gradients. Edge thickness indicates weight magnitude.

In practice, NAS algorithms using Gumbel-Softmax employ a temperature annealing schedule: training begins with a high temperature ฯ„ (encouraging exploration by keeping the distribution diffuse) and gradually decreases ฯ„ (encouraging exploitation by sharpening the distribution). This schedule mirrors the exploration-exploitation tradeoff in reinforcement learning and connects NAS to the broader family of simulated annealing algorithms.

fig:nas:relaxation-comparison contrasts the three approaches to operation selection on a single edge. The discrete approach is computationally cheap (only one operation is evaluated) but non-differentiable. The softmax relaxation is differentiable but requires evaluating all operations and produces a blended output that may not correspond to any single discrete architecture. The Gumbel-Softmax strikes a middle ground: it produces near-discrete samples while maintaining differentiability, at the cost of introducing stochasticity into the gradient estimates.

Proposition 15 (Temperature Annealing Convergence).

Consider a Gumbel-Softmax NAS procedure with temperature schedule ฯ„t=ฯ„0/(1+ฮฒt) for outer iteration t, where ฯ„0>0 and ฮฒ>0. As tโ†’โˆž, ฯ„tโ†’0, and the architecture distribution converges to a point mass on the discrete architecture ๐’œโˆ—=argโ€‰max๐’œโกp(๐’œ|๐œถ). Furthermore, if the loss landscape โ„’(๐’œ) has a unique global minimum ๐’œโˆ— and the annealing rate ฮฒ is sufficiently slow (ฮฒ=O(1/logโกt)), the procedure converges to ๐’œโˆ— in probability.

Proof sketch.

The convergence of ฯ„tโ†’0 ensures that the Gumbel-Softmax distribution concentrates on the argmax of ๐œถ+๐’ˆ. By Property (1) of Proposition 14, this argmax samples from the categorical distribution Categoricalโก(softmaxโก(๐œถ)). If the gradient-based updates on ๐œถ converge to a fixed point ๐œถโˆ— such that softmaxโก(๐œถโˆ—) places all mass on ๐’œโˆ—, then the procedure converges. The condition on ฮฒ ensures that the temperature decreases slowly enough for the gradient updates to track the changing landscape, analogous to the logarithmic cooling schedule in classical simulated annealing (see [13]).

Supernets and Weight Sharing

Continuous relaxations solve the problem of searching over discrete architectures, but they do not solve the problem of evaluating each candidate. Even with gradient-based architecture optimisation, each iteration requires a forward and backward pass through the full relaxed model, which contains all K operations on every edge. The computational cost of a single relaxed forward pass is therefore K times the cost of evaluating a single architecture.

A more fundamental efficiency concern is that NAS requires evaluating many architectures during the search process. If each evaluation requires full training (hundreds of epochs on a large dataset), the total cost is prohibitive. The supernet paradigm addresses this by training a single shared model from which all candidate architectures can be extracted and evaluated without retraining.

Definition 14 (Supernet (One-Shot Model)).

A supernet (also called a one-shot model) is a single over-parameterised network f๐œฝ,๐’ฎ that contains all candidate architectures ๐’œโˆˆ๐’ฎ as subnetworks. For any architecture ๐’œโˆˆ๐’ฎ, the subnetwork f๐œฝ๐’œ,๐’œ is obtained by selecting the relevant subset of weights ๐œฝ๐’œโŠ‚๐œฝ corresponding to the operations and connections specified by ๐’œ.

The supernet is trained once, and the performance of any architecture ๐’œ is estimated by evaluating its subnetwork using the shared weights ๐œฝ๐’œ, without any additional training.

The supernet concept is both elegant and radical. Consider a search space with 1029 candidate architectures. Training and evaluating each one independently would require 1029 training runs. With a supernet, a single training run suffices to obtain weight estimates for all architectures simultaneously. The cost reduction is astronomical: from 1029 training runs to one.

The mechanism is weight sharing: all candidate architectures share the same set of weights. If architecture ๐’œ1 uses a 3ร—3 convolution on edge (i,j) and architecture ๐’œ2 also uses a 3ร—3 convolution on edge (i,j) (but differs on other edges), they share the same convolutional weights on that edge. This sharing amortises the cost of training across all architectures.

The training procedure for a supernet is straightforward in principle. At each training step: (1) sample an architecture ๐’œโˆผp(๐’œ) from a distribution over the search space; (2) activate only the operations and connections corresponding to ๐’œ, masking all others; (3) perform a forward pass through the activated subnetwork; (4) compute the loss and backpropagate, updating only the weights used by ๐’œ. Over many training steps, all weights receive gradient updates, but each weight is updated only in the context of architectures that use it.

Caution.

Weight sharing introduces coupling between architectures. The performance of a subnetwork extracted from the supernet may differ significantly from its performance when trained from scratch (its stand-alone performance). This โ€œweight couplingโ€ arises because the shared weights are trained in the context of many different architectures. When operation A and operation B share upstream weights, training with A active affects B's performance, and vice versa. The shared weights must compromise between the conflicting demands of different architectures, leading to suboptimal performance for any single architecture. This coupling is the fundamental challenge of the supernet paradigm and has motivated extensive research into fairer and more accurate weight sharing strategies.

The practical impact of weight coupling is that the ranking of architectures by their supernet performance may differ from the ranking by their stand-alone performance. If the rankings are similar, the supernet is a reliable proxy for architecture evaluation: simply evaluate all (or many) subnetworks in the trained supernet and select the top-ranked one. If the rankings differ significantly, the supernet may lead the search astray, selecting architectures that perform well with shared weights but poorly with dedicated weights.

Definition 15 (Weight Sharing Fidelity).

The fidelity of weight sharing for a set of architectures {๐’œ1,โ€ฆ,๐’œn}โŠ‚๐’ฎ is defined as the rank correlation between shared and stand-alone performance: (WS Fidelity)ฯ=corrโก(rankโก(โ„’shared(๐’œi)),rankโก(โ„’standalone(๐’œi))), where โ„’shared(๐’œi) is the validation loss of architecture ๐’œi evaluated using supernet weights, โ„’standalone(๐’œi) is the validation loss after training ๐’œi from scratch, and rankโก(โ‹…) converts losses to ordinal ranks. High fidelity (ฯโ‰ˆ1) means the supernet ranking is a reliable proxy for true performance; low fidelity (ฯโ‰ˆ0) means the supernet provides no useful ranking information.

Empirical studies have found that fidelity varies widely depending on the search space, the supernet training procedure, and the sampling strategy. Early one-shot methods achieved fidelity values of ฯโ‰ˆ0.5โ€“0.7, barely above random ranking. More recent methods have pushed fidelity above 0.8 through careful design of the training procedure.

The sampling strategy, which determines how architectures are selected at each training step, is a key factor in fidelity. Different methods make different choices:

  • Uniform sampling selects each architecture with equal probability. This ensures that all operations receive equal training, but it may not allocate enough training to the most promising architectures.

  • Path-based sampling (used in ENAS [14]) selects a single path through the supernet DAG at each step, activating exactly one operation per edge. This is memory-efficient (only one operation is computed per edge) but may undertrain operations that are rarely sampled.

  • Fair sampling (used in FairNAS [15]) ensures that every operation on every edge receives exactly the same number of training steps. This eliminates the bias introduced by non-uniform sampling but requires careful bookkeeping.

  • Single-path one-shot [16] combines uniform path sampling with a strict training protocol that ensures convergence of all subnetworks. This approach achieves high fidelity by preventing any single architecture from dominating the training.

Supernet visualisation. The complete DAG (grey edges) contains all candidate operations on each edge. Three candidate architectures (๐’œ1 in red solid, ๐’œ2 in blue dashed, ๐’œ3 in green dotted) are highlighted as subnetworks. All three architectures share the same weight pool ๐œฝ: when ๐’œ1 and ๐’œ3 both use conv3 on edge (v0,v2), they use identical weights for that operation. This weight sharing enables evaluating all architectures after a single training run, at the cost of potential weight coupling.

fig:nas:supernet visualises the supernet concept. The complete DAG contains all operations on all edges. Each candidate architecture activates a subset of operations, forming a subnetwork. Different architectures may share operations (and therefore weights) on some edges while differing on others.

MethodSampling StrategyFidelity (ฯ)Search Cost
ENAS [14]RL controller samples paths0.5โ€“0.60.5 GPU-days
[3pt] One-Shot [17]Uniform random dropout of paths0.6โ€“0.71.5 GPU-days
[3pt] FairNAS [15]Strict fair sampling; each operation trained equally0.7โ€“0.82.0 GPU-days
[3pt] Single-Path [16]Uniform single-path; one op per edge per step0.75โ€“0.851.0 GPU-days
Comparison of weight sharing methods for one-shot NAS. Search cost is measured in GPU-days on CIFAR-10. Fidelity (ฯ) is the rank correlation between supernet and stand-alone performance, reported for the standard DARTS search space.

Table 6 compares the major weight sharing strategies along the dimensions of sampling strategy, fidelity, and search cost. The progression from ENAS to Single-Path illustrates the field's evolving understanding of the weight coupling problem: early methods prioritised speed (ENAS completed in half a GPU-day) at the expense of fidelity, while later methods accept modestly higher cost in exchange for more reliable architecture rankings.

The theoretical analysis of weight sharing fidelity remains incomplete. We can, however, state a basic result that connects fidelity to the diversity of the search space.

Theorem 4 (Weight Sharing Error Bound).

Let ๐œฝโˆ— denote the optimal supernet weights obtained by minimising ๐”ผ๐’œโˆผp(๐’œ)[โ„’(๐œฝ๐’œ,๐’œ)] over the weight pool ๐œฝ. For any architecture ๐’œ, let ๐œฝ๐’œ,aloneโˆ— denote the optimal stand-alone weights. Then the performance gap due to weight sharing is bounded by (WS Error Bound)โ„’(๐œฝ๐’œโˆ—,๐’œ)โˆ’โ„’(๐œฝ๐’œ,aloneโˆ—,๐’œ)โ‰คLฮธโ‹…โ€–๐œฝ๐’œโˆ—โˆ’๐œฝ๐’œ,aloneโˆ—โ€–, where Lฮธ is the Lipschitz constant of โ„’ with respect to ๐œฝ. Furthermore, the weight difference is bounded by the architectural diversity: (WS Weight DIFF)โ€–๐œฝ๐’œโˆ—โˆ’๐œฝ๐’œ,aloneโˆ—โ€–โ‰คLฮธฮผโ‹…๐”ผ๐’œโ€ฒโˆผp(๐’œโ€ฒ)[โ€–โˆ‡๐œฝ๐’œโ„’(๐œฝ๐’œโˆ—,๐’œโ€ฒ)โ€–], where ฮผ is the strong convexity constant of the per-architecture loss. The right-hand side measures the expected gradient magnitude on architecture ๐’œ's weights when evaluated on a different architecture ๐’œโ€ฒ: the more diverse the search space, the larger this โ€œgradient interferenceโ€ and the worse the weight sharing approximation.

Proof.

The first inequality follows directly from the Lipschitz assumption on โ„’.

For the second inequality , note that the supernet optimality condition requires ๐”ผ๐’œโ€ฒโˆผp(๐’œโ€ฒ)[โˆ‡๐œฝ๐’œโ„’(๐œฝ๐’œโˆ—,๐’œโ€ฒ)]=0, since ๐œฝโˆ— minimises the expected loss. The stand-alone optimality condition requires โˆ‡๐œฝ๐’œโ„’(๐œฝ๐’œ,aloneโˆ—,๐’œ)=0. Taking the difference, (WS GRAD Balance)0=๐”ผ๐’œโ€ฒ[โˆ‡๐œฝ๐’œโ„’(๐œฝ๐’œโˆ—,๐’œโ€ฒ)]=โˆ‡๐œฝ๐’œโ„’(๐œฝ๐’œโˆ—,๐’œ)+๐”ผ๐’œโ€ฒโ‰ ๐’œ[โˆ‡๐œฝ๐’œโ„’(๐œฝ๐’œโˆ—,๐’œโ€ฒ)]. The first term is the gradient that, if set to zero, would give the stand-alone optimum. Because ๐œฝ๐’œโˆ—โ‰ ๐œฝ๐’œ,aloneโˆ— in general, this gradient is nonzero and equals (in magnitude) the second term: the โ€œinterferenceโ€ from other architectures. By the ฮผ-strong convexity of โ„’(โ‹…,๐’œ), ฮผโ€–๐œฝ๐’œโˆ—โˆ’๐œฝ๐’œ,aloneโˆ—โ€–โ‰คโ€–โˆ‡๐œฝ๐’œโ„’(๐œฝ๐’œโˆ—,๐’œ)โ€–=โ€–๐”ผ๐’œโ€ฒโ‰ ๐’œ[โˆ‡๐œฝ๐’œโ„’(๐œฝ๐’œโˆ—,๐’œโ€ฒ)]โ€–. Applying Jensen's inequality to move the norm inside the expectation, and rescaling by Lฮธ/ฮผ, yields the bound .

The theorem provides a formal explanation for an empirical observation: weight sharing works well when the candidate architectures are similar (low gradient interference) and poorly when they are diverse (high gradient interference). This insight has practical implications for search space design: a search space should contain architectures that are diverse enough to include good candidates but similar enough that weight sharing provides reliable rankings.

Key Idea.

The supernet paradigm embodies a fundamental tradeoff: a diverse search space is more likely to contain excellent architectures but makes weight sharing less reliable. A narrow search space yields high-fidelity weight sharing but may exclude the optimal architecture. The art of practical NAS lies in finding the sweet spot where the search space is broad enough to contain good architectures and narrow enough for weight sharing to provide trustworthy rankings.

The supernet paradigm has become the dominant approach in practical NAS, enabling architecture searches that would be computationally infeasible with independent training. Its success rests on two empirical observations: first, that weight sharing fidelity is โ€œgood enoughโ€ for most search spaces (i.e., the top-ranked architectures by supernet performance tend to be among the top by stand-alone performance, even if the exact rankings differ); and second, that the computational savings are so enormous that even moderate fidelity losses are acceptable.

Looking forward, the supernet paradigm is being extended in several directions. Progressive shrinking [77] trains a single supernet at the largest scale and then โ€œshrinksโ€ it to obtain architectures of different sizes, enabling deployment across devices with different computational budgets. Hardware-aware supernets [32] incorporate latency measurements directly into the training loop, so the supernet learns not just which architectures are accurate but which are fast on target hardware. Multi-task supernets [78] extend weight sharing across tasks, so a single supernet can yield specialised architectures for different tasks.

These extensions represent the frontier of the supernet paradigm, and they share a common theme: leveraging the amortised nature of weight sharing to solve increasingly ambitious architecture search problems. The mathematical foundations developed in this section, including the combinatorial analysis of search spaces, the continuous relaxation framework, and the fidelity analysis of weight sharing, provide the theoretical grounding for these practical advances.

We conclude this section with a concise algorithmic summary of the one-shot NAS procedure built on supernets and continuous relaxations.

Algorithm 1 (One-Shot NAS with Weight Sharing).

Input: Search space ๐’ฎ=(๐’ช,๐’ข,๐’ž), training set ๐’Ÿtrain, validation set ๐’Ÿval, outer iterations T, inner steps K, temperature schedule {ฯ„t}t=1T.

Output: Discovered architecture ๐’œโˆ—.

  1. Initialise supernet weights ๐œฝ0 and architecture parameters ๐œถ0.

  2. For t=1,โ€ฆ,T: enumerate

  3. Inner loop (weight training): For k=1,โ€ฆ,K: itemize

  4. Sample architecture ๐’œโˆผGumbel-Softmax(๐œถ,ฯ„t).

  5. Compute training loss โ„’train(๐œฝ๐’œ,๐’œ;๐’Ÿtrain).

  6. Update weights: ๐œฝโ†๐œฝโˆ’ฮทinโˆ‡๐œฝโ„’train. itemize

  7. Outer loop (architecture update): itemize

  8. Compute validation loss โ„’val(๐œฝ๐’œ,๐’œ;๐’Ÿval).

  9. Update architecture parameters: ๐œถโ†๐œถโˆ’ฮทoutโˆ‡๐œถโ„’val. itemize

  10. Anneal temperature: ฯ„tโ†ฯ„0/(1+ฮฒt). enumerate

  11. Discretise: For each edge e, select keโˆ—=argโ€‰maxkโกฮฑe,k.

  12. Retrain: Train the discrete architecture ๐’œโˆ— from scratch to obtain final weights.

  13. Return ๐’œโˆ—.

The final retraining step (step 4) is critical. Due to weight coupling (warn:nas:weight-coupling), the supernet weights are suboptimal for any individual architecture. Retraining from scratch with the discovered architecture ๐’œโˆ— typically improves performance by 1โ€“3% on standard benchmarks. Some recent methods attempt to skip this step by fine-tuning the supernet weights for the selected architecture, but full retraining remains the gold standard for obtaining final performance numbers.

In the next sections, we turn from the mathematical structure of architecture spaces to the algorithms that navigate them. Armed with continuous relaxations and supernets, we will see how gradient-based methods, evolutionary algorithms, and reinforcement learning agents can discover architectures that match or exceed the best human designs.

Exercise 7.

Consider a neural network trained on task A to achieve parameters ๐œฝAโˆ—. The network is then modified by adding a new module m with parameters ๐œฝm initialised to zero, and trained on task B. Show that the initial architectural divergence ๐’Ÿ(๐’œ1,๐’œ2) is zero, and derive a condition on the learning rate ฮท that ensures ฮ”โ„’Aโ‰คฯต after one gradient step on task B.

Exercise 8.

Derive the relationship between the knowledge importance score ฮฉi (Definition 10) and the Fisher information matrix ๐… for a single task. Show that ฮฉi=wtโ‹…๐…ii when ๐’ฏ contains a single task t, and discuss why the diagonal approximation of ๐… is sufficient for computing ฮฉi but may miss interactions between parameters captured by off-diagonal terms.

Exercise 9.

Consider a hierarchical search space with two levels. At the lower level, motifs are built from K1=5 operations arranged in DAGs with N1=4 intermediate nodes. At the upper level, cells are built from K2 motifs arranged in DAGs with N2=3 intermediate nodes, where K2=|๐’ฎmotif| is the number of distinct motifs. Compute |๐’ฎmotif| and |๐’ฎcell|, and compare their product to the size of a flat search space with K1=5 and N=N1+N2=7.

Exercise 10.

Implement the Gumbel-Softmax estimator for a search space with K=4 operations and a single edge. Compute the variance of the gradient estimator โˆ‚โ„’/โˆ‚ฮฑk as a function of the temperature ฯ„โˆˆ{0.1,0.5,1.0,2.0,5.0}. Plot the variance and discuss the bias-variance tradeoff in choosing ฯ„.

Exercise 11.

Design an experiment to measure the weight sharing fidelity ฯ of a supernet. Describe how you would: (a) define the search space, (b) train the supernet, (c) sample a set of architectures and evaluate their supernet performance, (d) train each sampled architecture from scratch and evaluate its stand-alone performance, and (e) compute and report ฯ. What is the minimum number of architectures needed to obtain a statistically reliable estimate of ฯ?

Exercise 12.

Consider a NAS problem with two objectives: accuracy a(๐’œ) and latency โ„“(๐’œ). Define the Pareto frontier formally, prove that it is a connected curve in the (a,โ„“) plane under mild continuity assumptions, and show that any architecture on the frontier can be obtained by solving min๐’œโกฮฒโ‹…(1โˆ’a(๐’œ))+(1โˆ’ฮฒ)โ‹…โ„“(๐’œ) for an appropriate ฮฒโˆˆ[0,1] (assuming convexity of the Pareto frontier).

Reinforcement Learning-Based NAS

The modern neural architecture search story begins with a bold idea: what if we trained a neural network to design other neural networks? In 2017, Barret Zoph and Quoc Le did exactly that, using reinforcement learning to automate architecture design [18]. The result was architectures that matched or exceeded human-designed ones on competitive benchmarks, but at a staggering computational cost: 800 GPUs running for 28 days. This section develops the mathematical framework behind reinforcement learning-based NAS, analyses its strengths and weaknesses, and explains why its sheer computational extravagance motivated the efficient alternatives that followed.

The core idea is elegant in its simplicity. A controller network learns to generate architecture descriptions by trial and error. Each generated architecture is trained and evaluated, and the resulting performance serves as a reward signal that guides the controller toward better designs. The controller is itself a neural network, so we arrive at the recursive spectacle of a neural network learning to design neural networks.

NAS with Reinforcement Learning (Zoph & Le, 2017)

Historical Note.

The paper that launched modern NAS appeared at ICLR 2017 [18]. Zoph and Le used a recurrent neural network (RNN) controller trained with the REINFORCE algorithm [19] to generate architecture descriptions as sequences of tokens. Each token specifies a layer type, kernel size, number of filters, or stride value. The controller generates a complete โ€œchild networkโ€ specification, which is then trained to convergence on the target task, and the validation accuracy of the trained child becomes the reward signal for the controller. The search required 800 GPU-days of computation (approximately 19,200 GPU-hours) and produced an architecture achieving 3.65% test error on CIFAR-10, competitive with the best human-designed networks of the time. The paper demonstrated that automated architecture design was not merely feasible but could match expert performance, and it ignited an explosion of research that produced over a thousand follow-up papers within three years.

The controller RNN.

The controller is a long short-term memory (LSTM) network [79] that outputs a sequence of actions (tokens) specifying the child architecture. For a convolutional network with L layers, the controller produces 4L tokens: for each layer tโˆˆ{1,โ€ฆ,L}, it outputs the filter height ht, filter width wt, number of filters nt, and stride st. The tokens are generated autoregressively: each token is sampled from a softmax distribution conditioned on all previous tokens, and the sampled token is fed back as input to the next time step.

Definition 16 (Controller Policy).

The controller defines a stochastic policy ฯ€๐“(at|a1:tโˆ’1) parameterised by LSTM weights ๐“, where action at specifies layer t's hyperparameters. For a convolutional search space, the action at layer t is the tuple at=(ht,wt,nt,st) consisting of filter height, filter width, number of filters, and stride. The full architecture is the action sequence (Architecture Sequence)๐’œ=(a1,a2,โ€ฆ,aL), and the joint probability of generating ๐’œ under the policy is (Policy PROB)ฯ€๐“(๐’œ)=โˆt=1Lฯ€๐“(at|a1:tโˆ’1)=โˆt=1Lโˆkโˆˆ{h,w,n,s}ฯ€๐“(at(k)|a1:tโˆ’1,at(1:kโˆ’1)).

The reward signal.

Once the controller samples an architecture ๐’œ, a child network f๐œฝ,๐’œ with that architecture is constructed and trained from scratch on the training set until convergence (or for a fixed number of epochs). Let ๐œฝโˆ—(๐’œ) denote the trained parameters. The reward is the validation accuracy of the trained child: (Reward)R(๐’œ)=Accval(f๐œฝโˆ—(๐’œ),๐’œ). This reward is non-differentiable with respect to the controller parameters ๐“ because it depends on the discrete architecture ๐’œ and the outcome of an entire training run. Reinforcement learning provides the tools to optimise ๐“ despite this non-differentiability.

Algorithm 2 (RL-Based Neural Architecture Search).

  1. Input: Controller policy ฯ€๐“; search space ๐’ฎ; number of iterations N; controller learning rate ฮท; baseline decay ฮณ
  2. Initialise controller parameters ๐“ randomly
  3. Initialise baseline bโ†0
  4. for i=1,โ€ฆ,N
  5. Sample architecture ๐’œiโˆผฯ€๐“ Controller generates child specification
  6. Construct child network f๐œฝ,๐’œi
  7. Train child to convergence: ๐œฝโˆ—โ†argโ€‰min๐œฝโกโ„’train(f๐œฝ,๐’œi) Full training run
  8. Evaluate reward Riโ†Accval(f๐œฝโˆ—,๐’œi)
  9. Update baseline bโ†ฮณb+(1โˆ’ฮณ)Ri Exponential moving average
  10. Compute policy gradient estimate: ๐’ˆ^iโ†(Riโˆ’b)โˆ‡๐“logโกฯ€๐“(๐’œi)
  11. Update controller: ๐“โ†๐“+ฮท๐’ˆ^i
  12. return best architecture ๐’œโˆ—=argโ€‰maxiโˆˆ{1,โ€ฆ,N}โกRi

The algorithm is conceptually straightforward but computationally devastating. Step 6 requires training a full neural network to convergence for every sampled architecture. With N on the order of thousands, and each training run requiring hours of GPU time, the total cost is enormous.

The RL-based NAS pipeline. An LSTM controller generates a sequence of tokens specifying the child architecture. The child network is built, trained to convergence, and evaluated on a validation set. The validation accuracy serves as the reward signal for REINFORCE, which updates the controller parameters ๐“. The dashed red arrow indicates the policy gradient signal flowing back to the controller.

REINFORCE and Policy Gradient for Architecture Search

The controller's objective is to maximise the expected reward over architectures sampled from its policy: (RL Objective)J(๐“)=๐”ผ๐’œโˆผฯ€๐“[R(๐’œ)]. Since R(๐’œ) is non-differentiable with respect to ๐“ (it involves discrete sampling and an entire training procedure), we cannot compute โˆ‡๐“J by backpropagation through the reward. Instead, we apply the policy gradient theorem, also known as the REINFORCE estimator [19].

Definition 17 (Policy Gradient for NAS).

The policy gradient of the NAS objective (RL Objective) is (Policy Gradient)โˆ‡๐“J(๐“)=๐”ผ๐’œโˆผฯ€๐“[R(๐’œ)โˆ‡๐“logโกฯ€๐“(๐’œ)]. This identity holds because โˆ‡๐“ฯ€๐“(๐’œ)=ฯ€๐“(๐’œ)โˆ‡๐“logโกฯ€๐“(๐’œ), which allows the gradient to be written as an expectation under the current policy, enabling Monte Carlo estimation.

Derivation.

Starting from the definition of J: (Reinforce Derivation)โˆ‡๐“J(๐“)=โˆ‡๐“โˆ‘๐’œโˆˆ๐’ฎฯ€๐“(๐’œ)R(๐’œ)=โˆ‘๐’œโˆˆ๐’ฎR(๐’œ)โˆ‡๐“ฯ€๐“(๐’œ)=โˆ‘๐’œโˆˆ๐’ฎR(๐’œ)ฯ€๐“(๐’œ)โˆ‡๐“logโกฯ€๐“(๐’œ)=๐”ผ๐’œโˆผฯ€๐“[R(๐’œ)โˆ‡๐“logโกฯ€๐“(๐’œ)]. The second line uses the fact that R(๐’œ) does not depend on ๐“ (the reward is a constant for a given architecture). The third line applies the log-derivative trick: โˆ‡๐“ฯ€๐“=ฯ€๐“โˆ‡๐“logโกฯ€๐“.

Variance reduction via baseline.

The raw REINFORCE estimator suffers from high variance because the reward R(๐’œ) can vary substantially across sampled architectures. A standard technique is to subtract a baseline b that does not depend on the current action: (Reinforce Baseline)โˆ‡๐“J(๐“)โ‰ˆ1Mโˆ‘i=1M(Riโˆ’b)โˆ‡๐“logโกฯ€๐“(๐’œi), where M is the number of sampled architectures per update and b is typically an exponential moving average of past rewards. The baseline does not introduce bias: ๐”ผ๐’œ[bโˆ‡๐“logโกฯ€๐“(๐’œ)]=bโˆ‡๐“โˆ‘๐’œฯ€๐“(๐’œ)=bโˆ‡๐“1=0. The optimal baseline (minimising variance) is the weighted expectation bโˆ—=๐”ผ[Rโ‹…โ€–โˆ‡๐“logโกฯ€๐“โ€–2]/๐”ผ[โ€–โˆ‡๐“logโกฯ€๐“โ€–2], but the exponential moving average is a practical and effective approximation.

Proposition 16 (Sample Complexity of RL-NAS).

Let ๐’ฎ be a finite search space and let Rโˆ—=max๐’œโˆˆ๐’ฎโกR(๐’œ) be the optimal reward. Suppose R(๐’œ)โˆˆ[0,1] for all ๐’œ. The number of architecture evaluations N needed by any algorithm (including RL-NAS) to find an architecture ๐’œ^ satisfying Rโˆ—โˆ’R(๐’œ^)โ‰คฯต with probability at least 1โˆ’ฮด is (Sample Lower Bound)N=ฮฉ(๐–ตar๐’œโˆผUnif(๐’ฎ)โก(R)ฯต2logโก1ฮด).

Proof.

We reduce to a multi-armed bandit lower bound. Consider each architecture ๐’œโˆˆ๐’ฎ as an arm with expected reward ฮผ๐’œ=R(๐’œ). An algorithm that finds an ฯต-optimal arm with probability 1โˆ’ฮด must distinguish arms whose means differ by at most ฯต.

Fix two architectures ๐’œ1,๐’œ2 with |R(๐’œ1)โˆ’R(๐’œ2)|=ฯต. By the Neymanโ€“Pearson lemma, any test distinguishing these two hypotheses from N independent observations requires (Neyman Pearson Bound)Nโ‰ฅ2ฯƒ2ฯต2logโก12ฮด, where ฯƒ2=๐–ตarโก(R) captures the noise in reward estimates (due to stochastic training, data sampling, and architectural variation). Applying a union bound over the |๐’ฎ| arms and noting that the hardest pair determines the lower bound, we obtain N=ฮฉ(ฯƒ2ฯต2logโก1ฮด).

Caution.

The original NAS experiment consumed approximately 800 GPU-days, equivalent to roughly 19,200 GPU-hours. At 2017 cloud computing prices, this corresponds to approximately $50,000 in compute costs. For perspective, training a single ResNet-110 on CIFAR-10 takes roughly 0.25 GPU-days. The NAS controller evaluated approximately 12,800 child architectures, each trained for 50 epochs. This computational barrier placed NAS beyond the reach of all but the most well-resourced laboratories and became the primary motivation for the efficient methods developed in sec:nas:enas,sec:nas:darts,sec:nas:modern.

The computational tragedy.

The fundamental inefficiency of RL-based NAS lies in a simple observation: most of the computation goes to training child networks that are immediately discarded. Of the โˆผ12,800 architectures evaluated by Zoph and Le, only the single best one was ultimately used. The remaining 12,799 training runs produced parameters that were thrown away after a single validation accuracy measurement. Every child network is trained from scratch, with no knowledge transfer from previously trained children. This is analogous to solving a jigsaw puzzle by independently attempting every possible arrangement from scratch, rather than building incrementally on partial solutions.

Extensions to the search space.

Zoph et al. (2018) extended the approach to search for cells rather than entire architectures [23]. A cell is a small computational graph (typically 5โ€“7 nodes) that is repeated and stacked to form the full network. This cell-based search reduces the search space dramatically while allowing the discovered cell to transfer across datasets: a cell found on CIFAR-10 can be stacked more times to build a competitive ImageNet model. The NASNet architecture, discovered through this cell-based search, achieved 82.7% top-1 accuracy on ImageNet, a state-of-the-art result at the time.

Remark 11.

While the original work used REINFORCE, subsequent RL-based NAS methods explored alternative reinforcement learning algorithms. Proximal Policy Optimisation (PPO) [20] was used for more stable controller training. Baker et al. [21] used Q-learning to explore the architecture space. Real et al. [22] showed that evolutionary methods (tournament selection with mutation) could match or exceed RL-based search, achieving 3.34% error on CIFAR-10 with the base AmoebaNet (and as low as 2.13% when the discovered cell is scaled up), at a search cost of 3,150 GPU-days. The diversity of search strategies suggested that the search algorithm itself was less important than the search space design and the evaluation protocol.

ENAS: Efficient NAS via Parameter Sharing

The single most wasteful aspect of RL-based NAS is that each child network is trained from scratch. Pham et al. (2018) [24] asked a simple but transformative question: what if child networks shared their weights? The answer was ENAS (Efficient Neural Architecture Search), which reduced the search cost from 800 GPU-days to 0.5 GPU-days, a speedup of 1,600 times, by having all candidate architectures share parameters through a single large โ€œsupernet.โ€

The Parameter Sharing Insight

The key observation is that child networks in RL-NAS are not independent: they share similar computations. A 3ร—3 convolution at layer 5 performs the same type of computation regardless of what operations surround it. If one child has already trained this convolution, a second child that also uses a 3ร—3 convolution at layer 5 should be able to reuse the learned filters rather than learning them from scratch.

Definition 18 (ENAS Supernet).

A supernet (also called a one-shot model) is a single directed acyclic graph G=(V,E) that contains all candidate operations on each edge. Formally, for each edge (i,j)โˆˆE, the supernet maintains a set of operations ๐’ชij={o1,o2,โ€ฆ,oK}, each with its own parameters. A candidate architecture ๐’œ is a subgraph of G obtained by selecting exactly one operation per edge: (Subgraph)๐’œ={(i,j,oij(k)):(i,j)โˆˆE,k=kij(๐’œ)}. All architectures share the supernet's weight pool ๐œฝ={๐œฝij(k)}(i,j)โˆˆE,k=1,โ€ฆ,K. A controller ฯ€๐“ selects which subgraph to activate at each training step.

Key Idea.

ENAS amortises the cost of training across all architectures. Instead of training each child from scratch, every child inherits pre-trained weights from the supernet. The supernet serves as a shared memory: when one architecture trains the 3ร—3 convolution at layer 5, all other architectures that use the same operation at the same layer benefit from the updated weights. This transforms the cost from O(Nโ‹…C) (where N is the number of architectures and C is the cost of training one child) to O(C) (the cost of training the supernet once), a reduction from thousands of GPU-days to a single GPU-day.

Training procedure.

ENAS alternates between two phases in each iteration:

  1. Supernet weight update. Fix the controller parameters ๐“. Sample an architecture ๐’œโˆผฯ€๐“, activate the corresponding subgraph of the supernet, and update the shared weights ๐œฝ using standard stochastic gradient descent on the training loss: (ENAS Weight Update)๐œฝโ†๐œฝโˆ’ฮท๐œฝโˆ‡๐œฝโ„’train(f๐œฝ๐’œ,๐’œ). Only the weights ๐œฝ๐’œ belonging to the active subgraph receive gradient updates.

  2. Controller update. Fix the supernet weights ๐œฝ. Sample M architectures ๐’œ1,โ€ฆ,๐’œM from ฯ€๐“. Evaluate each on the validation set (without any further training) and compute rewards Ri=Accval(f๐œฝ๐’œi,๐’œi). Update the controller with REINFORCE: (ENAS Controller Update)๐“โ†๐“+ฮท๐“1Mโˆ‘i=1M(Riโˆ’b)โˆ‡๐“logโกฯ€๐“(๐’œi).

Algorithm 3 (ENAS Training Loop).

  1. Input: Supernet G with shared weights ๐œฝ; controller ฯ€๐“; training set ๐’Ÿtrain; validation set ๐’Ÿval; learning rates ฮท๐œฝ,ฮท๐“; baseline decay ฮณ
  2. Initialise ๐œฝ and ๐“ randomly; set baseline b=0
  3. for epoch =1,2,โ€ฆ
  4. for each minibatch (๐’™,๐’š)โˆˆ๐’Ÿtrain
  5. Phase 1: Train supernet weights
  6. Sample ๐’œโˆผฯ€๐“ Controller generates architecture
  7. Activate subgraph ๐’œ in supernet G
  8. ๐œฝโ†๐œฝโˆ’ฮท๐œฝโˆ‡๐œฝโ„’(f๐œฝ๐’œ(๐’™),๐’š) Update only active weights
  9. for i=1,โ€ฆ,M
  10. Phase 2: Train controller
  11. Sample ๐’œiโˆผฯ€๐“
  12. Riโ†Accval(f๐œฝ๐’œi) Evaluate on validation set, no training
  13. bโ†ฮณb+(1โˆ’ฮณ)Ri
  14. ๐“โ†๐“+ฮท๐“1Mโˆ‘i=1M(Riโˆ’b)โˆ‡๐“logโกฯ€๐“(๐’œi)
  15. Derive final architecture ๐’œโˆ—=argโ€‰maxiโกRi
  16. Retrain ๐’œโˆ— from scratch on full training set

The ENAS supernet. Each layer position offers multiple candidate operations (nodes). Gray edges represent the full supernet; blue highlighted nodes and edges represent a single architecture ๐’œ sampled by the controller. All operations share weights through the supernet, so training one architecture updates weights that benefit all architectures using the same operations.

Convergence Analysis

Parameter sharing introduces a fundamental approximation: the supernet weights ๐œฝ๐’œ (the subset of supernet weights used by architecture ๐’œ) are not the same as the weights ๐œฝโˆ—(๐’œ) that would be obtained by training ๐’œ from scratch. This raises two questions. First, how large is the approximation error? Second, does the supernet preserve the ranking of architectures?

Theorem 5 (ENAS Weight Sharing Approximation).

Let โ„’val be L-Lipschitz continuous in its first argument (the network parameters). For any architecture ๐’œ in the search space, the validation loss evaluated with the supernet weights ๐œฝ๐’œ (restricted to ๐’œ) satisfies (ENAS Approx Bound)|โ„’val(f๐œฝ๐’œ,๐’œ)โˆ’โ„’val(f๐œฝโˆ—(๐’œ),๐’œ)|โ‰คLโ‹…โ€–๐œฝ๐’œโˆ’๐œฝโˆ—(๐’œ)โ€–2, where ๐œฝโˆ—(๐’œ)=argโ€‰min๐œฝโกโ„’train(f๐œฝ,๐’œ) are the optimal stand-alone weights for ๐’œ.

Proof.

By the definition of Lipschitz continuity, for any two parameter vectors ๐œฝ1,๐œฝ2 and fixed architecture ๐’œ: |โ„’val(f๐œฝ1,๐’œ)โˆ’โ„’val(f๐œฝ2,๐’œ)|โ‰คLโ‹…โ€–๐œฝ1โˆ’๐œฝ2โ€–2. Setting ๐œฝ1=๐œฝ๐’œ (supernet weights restricted to ๐’œ) and ๐œฝ2=๐œฝโˆ—(๐’œ) (optimal stand-alone weights) yields the result directly.

The bound in Theorem 5 is tight in the sense that the Lipschitz constant L cannot be removed. However, the bound is only useful if โ€–๐œฝ๐’œโˆ’๐œฝโˆ—(๐’œ)โ€–2 is small, which is an empirical question that depends on how well the supernet training distributes capacity across architectures.

The ranking correlation problem.

For NAS, the absolute quality of each architecture's evaluation matters less than the ranking: we need the supernet to correctly identify which architectures are better than which. The standard measure is Kendall's ฯ„ rank correlation between the supernet ranking and the true ranking (obtained by training each architecture from scratch). Empirical studies report moderate correlations of ฯ„โ‰ˆ0.5โ€“0.7, indicating that the supernet ranking is informative but imperfect.

Proposition 17 (Ranking Preservation Condition).

Let โ„’โˆ—(๐’œ)=โ„’val(f๐œฝโˆ—(๐’œ),๐’œ) denote the true validation loss and โ„’shared(๐’œ)=โ„’val(f๐œฝ๐’œ,๐’œ) denote the supernet validation loss. The supernet preserves the ranking of two architectures ๐’œ1,๐’œ2 (i.e., if โ„’โˆ—(๐’œ1)<โ„’โˆ—(๐’œ2) then โ„’shared(๐’œ1)<โ„’shared(๐’œ2)) whenever (Ranking Condition)โ€–๐œฝ๐’œ1โˆ’๐œฝโˆ—(๐’œ1)โ€–2โˆ’โ€–๐œฝ๐’œ2โˆ’๐œฝโˆ—(๐’œ2)โ€–2<|โ„’โˆ—(๐’œ1)โˆ’โ„’โˆ—(๐’œ2)|L.

Proof.

By the triangle inequality applied to Theorem 5, we have for each architecture: โ„’shared(๐’œk)โˆˆ[โ„’โˆ—(๐’œk)โˆ’Lโ€–๐œฝ๐’œkโˆ’๐œฝโˆ—(๐’œk)โ€–,โ„’โˆ—(๐’œk)+Lโ€–๐œฝ๐’œkโˆ’๐œฝโˆ—(๐’œk)โ€–]. For the ranking to be preserved, we need โ„’shared(๐’œ1)<โ„’shared(๐’œ2). A sufficient condition is that the upper bound for ๐’œ1 is below the lower bound for ๐’œ2: โ„’โˆ—(๐’œ1)+Lโ€–๐œฝ๐’œ1โˆ’๐œฝโˆ—(๐’œ1)โ€–<โ„’โˆ—(๐’œ2)โˆ’Lโ€–๐œฝ๐’œ2โˆ’๐œฝโˆ—(๐’œ2)โ€–. Rearranging: L(โ€–๐œฝ๐’œ1โˆ’๐œฝโˆ—(๐’œ1)โ€–+โ€–๐œฝ๐’œ2โˆ’๐œฝโˆ—(๐’œ2)โ€–)<โ„’โˆ—(๐’œ2)โˆ’โ„’โˆ—(๐’œ1). This is a stronger condition than stated. A necessary condition for ranking reversal is that the approximation errors are large enough to bridge the gap between the true losses, which yields the stated bound as a sufficient condition for preservation.

The proposition reveals that ranking preservation depends on two factors: the gap between the true losses (large gaps are easier to preserve) and the uniformity of approximation errors (if all architectures have similar approximation error, rankings are preserved even when the absolute error is large).

MethodSearch CostCIFAR-10Penn Treebank
(GPU-days)Error (%)PPL
NAS [18]8003.6562.4
NASNet [23]1,8002.65โ€“
ENAS [24]0.52.8955.8
Random search baseline0.53.2967.1
Comparison of RL-based NAS and ENAS. ENAS achieves comparable accuracy with a 1,600ร— reduction in search cost through parameter sharing.

DARTS: Differentiable Architecture Search

ENAS shared weights but still used REINFORCE to search over architectures. Liu, Simonyan, and Yang (2019) [25] asked whether the architecture search itself could be made differentiable. If so, gradient descent, the most efficient optimisation tool available, could search over architectures directly. The result was DARTS (Differentiable Architecture Search), which replaced discrete architecture choices with a continuous relaxation, enabling end-to-end gradient-based optimisation of both the network weights and the architecture.

Making Architecture Search Differentiable

The central insight of DARTS is to replace discrete choices with continuous mixtures. Rather than selecting a single operation on each edge of the cell DAG, DARTS computes a weighted sum of all candidate operations, where the weights are determined by learnable architecture parameters.

Definition 19 (DARTS Mixed Operation).

For each edge (i,j) in the cell directed acyclic graph, DARTS computes the mixed operation: (Darts Mixed OP)oโ€พ(i,j)(๐’™)=โˆ‘oโˆˆ๐’ชexpโก(ฮฑo(i,j))โˆ‘oโ€ฒโˆˆ๐’ชexpโก(ฮฑoโ€ฒ(i,j))o(๐’™), where ๐’ช={conv3ร—3,conv5ร—5,maxpool3ร—3,skip,zero} is the set of candidate operations and ๐œถ={ฮฑo(i,j)} are the architecture parameters. During search, all operations execute in parallel with softmax-weighted mixing. After search, the final architecture retains only the dominant operation on each edge: oโˆ—=argโ€‰maxoโˆˆ๐’ชโกฮฑo(i,j).

The softmax weighting makes the output oโ€พ(i,j)(๐’™) differentiable with respect to ๐œถ, which is the key property enabling gradient-based search. As the architecture parameters converge, the softmax distribution concentrates on a single operation, and the continuous relaxation approaches a discrete architecture.

Bilevel optimisation formulation.

DARTS optimises two sets of parameters simultaneously: the network weights ๐œฝ (convolution filters, batch normalisation parameters, etc.) and the architecture parameters ๐œถ. The weights are trained on the training set, while the architecture parameters are optimised on the validation set. This is naturally expressed as a bilevel optimisation problem: (Darts Bilevel)min๐œถโกโ„’val(๐œฝโˆ—(๐œถ),๐œถ)subjectย to๐œฝโˆ—(๐œถ)=argโ€‰min๐œฝโกโ„’train(๐œฝ,๐œถ). The outer problem ((Darts Bilevel)) seeks architecture parameters that minimise the validation loss, while the inner problem ((Darts Bilevel)) requires that the network weights are optimal for the current architecture.

Algorithm 4 (DARTS: Differentiable Architecture Search).

  1. Input: Cell DAG with edges E; candidate operations ๐’ช; training set ๐’Ÿtrain; validation set ๐’Ÿval; learning rates ฮท๐œฝ,ฮท๐œถ; inner approximation step size ฮพ
  2. Initialise network weights ๐œฝ randomly
  3. Initialise architecture parameters ๐œถ uniformly Equal weight on all operations
  4. while not converged
  5. Step 1: Update weights (inner optimisation)
  6. Sample minibatch (๐’™train,๐’štrain) from ๐’Ÿtrain
  7. ๐œฝโ†๐œฝโˆ’ฮท๐œฝโˆ‡๐œฝโ„’train(๐œฝ,๐œถ)
  8. Step 2: Update architecture (outer optimisation)
  9. Sample minibatch (๐’™val,๐’šval) from ๐’Ÿval
  10. Compute one-step approximation: ๐œฝโ€ฒโ†๐œฝโˆ’ฮพโˆ‡๐œฝโ„’train(๐œฝ,๐œถ)
  11. ๐œถโ†๐œถโˆ’ฮท๐œถโˆ‡๐œถโ„’val(๐œฝโ€ฒ,๐œถ) Approximate hypergradient
  12. Step 3: Derive discrete architecture
  13. for each edge (i,j)โˆˆE
  14. Select operation oijโˆ—โ†argโ€‰maxoโˆˆ๐’ชโกฮฑo(i,j)
  15. Retrain derived architecture from scratch Standard training

The search cost of DARTS is approximately 1.5 GPU-days on CIFAR-10, which is 500ร— cheaper than the original NAS and 3ร— more expensive than ENAS. However, DARTS achieves 2.76% test error on CIFAR-10, competitive with the best NAS results.

The DARTS continuous relaxation. (a) During search, each edge carries a weighted mixture of all candidate operations, with weights determined by architecture parameters ๐œถ via softmax. Line thickness indicates the softmax weight. (b) As training progresses, ๐œถ converges and the weights concentrate on dominant operations. (c) After search, the architecture is discretised by retaining only the highest-weight operation on each edge.

The Bilevel Optimisation Problem

The outer objective in (Darts Bilevel) depends on ๐œถ both directly and through ๐œฝโˆ—(๐œถ). Computing the full gradient requires implicit differentiation through the inner optimisation, which involves the Hessian of the training loss.

The hypergradient.

By the implicit function theorem, the gradient of the outer objective with respect to ๐œถ is: (Darts Hypergradient)โˆ‡๐œถโ„’val(๐œฝโˆ—(๐œถ),๐œถ)=โˆ‡๐œถโ„’valโˆ’ฮพโˆ‡๐œถ,๐œฝ2โ„’trainโ‹…(โˆ‡๐œฝ2โ„’train)โˆ’1โ‹…โˆ‡๐œฝโ„’val, where all quantities are evaluated at (๐œฝโˆ—(๐œถ),๐œถ) and ฮพ is the inner learning rate. The second term involves the inverse Hessian (โˆ‡๐œฝ2โ„’train)โˆ’1, which is prohibitively expensive to compute for large networks.

First-order approximation.

The simplest approximation sets ฮพ=0, which eliminates the second-order term entirely. The approximate gradient is simply: (Darts First Order)๐’ˆ^first=โˆ‡๐œถโ„’val(๐œฝ,๐œถ), where ๐œฝ is the current (not optimal) weight vector. This is cheap to compute (a single backward pass through the validation loss) but ignores the dependence of ๐œฝโˆ— on ๐œถ.

Second-order approximation.

DARTS approximates the Hessian-vector product using finite differences. Let ๐’˜=โˆ‡๐œฝโ„’val and choose a small ฯต>0. Then: (Darts Finite DIFF)โˆ‡๐œถ,๐œฝ2โ„’trainโ‹…๐’˜โ‰ˆโˆ‡๐œถโ„’train(๐œฝ+ฯต๐’˜,๐œถ)โˆ’โˆ‡๐œถโ„’train(๐œฝโˆ’ฯต๐’˜,๐œถ)2ฯต. This requires two additional forward-backward passes (at ๐œฝยฑฯต๐’˜) but avoids computing or storing the full Hessian.

Theorem 6 (DARTS First-Order Approximation Error).

Let ๐’ˆ^=โˆ‡๐œถโ„’val(๐œฝ,๐œถ) denote the first-order DARTS gradient and ๐’ˆโˆ—=โˆ‡๐œถโ„’val(๐œฝโˆ—(๐œถ),๐œถ) denote the true hypergradient. Assume that โˆ‡๐œถโ„’val(โ‹…,๐œถ) is Lval-Lipschitz continuous. Then (Darts First Order Bound)โ€–๐’ˆ^โˆ’๐’ˆโˆ—โ€–โ‰คLvalโ‹…โ€–๐œฝโˆ’๐œฝโˆ—(๐œถ)โ€–โ‰คLvalโ‹…ฮทinโ‹…โ€–โˆ‡๐œฝโ„’train(๐œฝ,๐œถ)โ€–, where ฮทin is the inner learning rate.

Proof.

The first inequality follows directly from the Lipschitz condition: (Darts Proof Step1)โ€–๐’ˆ^โˆ’๐’ˆโˆ—โ€–=โ€–โˆ‡๐œถโ„’val(๐œฝ,๐œถ)โˆ’โˆ‡๐œถโ„’val(๐œฝโˆ—(๐œถ),๐œถ)โ€–โ‰คLvalโ‹…โ€–๐œฝโˆ’๐œฝโˆ—(๐œถ)โ€–2.

For the second inequality, observe that after one step of gradient descent on the inner problem, the weights move from ๐œฝ to ๐œฝโˆ’ฮทinโˆ‡๐œฝโ„’train(๐œฝ,๐œถ). Since the first-order DARTS approximation effectively treats the current ๐œฝ as if it were ๐œฝโˆ—(๐œถ), the approximation error is bounded by the distance to the true optimum. After T steps of the inner optimisation, the distance satisfies โ€–๐œฝTโˆ’๐œฝโˆ—โ€–โ‰คโ€–๐œฝTโˆ’1โˆ’๐œฝโˆ—โ€– (assuming the inner problem is convex and ฮทinโ‰ค1/Ltrain). In the single-step approximation used by DARTS, the distance is bounded by the step size: โ€–๐œฝโˆ’๐œฝโˆ—(๐œถ)โ€–โ‰คฮทinโ‹…โ€–โˆ‡๐œฝโ„’train(๐œฝ,๐œถ)โ€–. Combining with (Darts Proof Step1) yields the result.

Theorem 6 reveals an important tradeoff: a smaller inner learning rate ฮทin reduces the approximation error but slows convergence of the inner problem. In practice, ฮทin is set between 0.01 and 0.1.

Proposition 18 (DARTS Convergence Rate).

Assume the following conditions hold:

  1. โ„’train(โ‹…,๐œถ) is ฮผ-strongly convex for each ๐œถ;

  2. โ„’val(๐œฝ,โ‹…) is L-smooth for each ๐œฝ;

  3. โˆ‡๐œถโ„’val is Lval-Lipschitz in ๐œฝ.

Then DARTS with second-order approximation, inner learning rate ฮทin=1/Ltrain, and outer learning rate ฮท๐œถ=1/L, converges to a stationary point of the outer objective at rate (Darts Convergence RATE)1Tโˆ‘t=1Tโ€–โˆ‡๐œถโ„’val(๐œฝโˆ—(๐œถt),๐œถt)โ€–2=O(1T), where the constant depends on L, ฮผ, Lval, and the initial suboptimality โ„’val(๐œฝโˆ—(๐œถ0),๐œถ0)โˆ’inf๐œถโกโ„’val(๐œฝโˆ—(๐œถ),๐œถ).

Proof.

Under ฮผ-strong convexity of the inner problem, the implicit function theorem guarantees that ๐œฝโˆ—(๐œถ) is well-defined and differentiable with โ€–โˆ‡๐œถ๐œฝโˆ—โ€–โ‰คLcross/ฮผ, where Lcross is the Lipschitz constant of โˆ‡๐œถ,๐œฝ2โ„’train. The outer objective F(๐œถ)=โ„’val(๐œฝโˆ—(๐œถ),๐œถ) is therefore smooth with a Lipschitz gradient constant that depends on L, Lval, Lcross, and ฮผ. Standard gradient descent on a smooth function with step size 1/L satisfies the O(1/T) convergence guarantee for the average squared gradient norm, by the descent lemma applied at each step: F(๐œถt+1)โ‰คF(๐œถt)โˆ’12Lโ€–โˆ‡F(๐œถt)โ€–2. Summing over t=0,โ€ฆ,Tโˆ’1 and dividing by T yields (Darts Convergence RATE). The second-order approximation introduces an additional error term that can be bounded using (Darts Finite DIFF), and absorbed into the constant under the stated assumptions.

Failure Modes and Fixes

Despite its elegance, DARTS suffers from several well-documented failure modes that arise from the gap between the continuous relaxation and the discrete architecture it approximates.

Skip connection dominance.

The most common failure mode is that DARTS tends to select an excessive number of skip connections. Skip connections have near-zero parameters (they simply pass the input through), making them easy for the optimiser to learn: the architecture parameters ฮฑskip(i,j) grow faster than those for parameterised operations because skip connections do not suffer from the slow training dynamics of convolutions. The resulting architectures contain too many skip connections and too few learned transformations, leading to poor final performance.

Performance collapse.

A related failure mode is performance collapse: as the search progresses, the validation loss initially decreases but then increases sharply in later epochs. The architecture degenerates as the continuous relaxation drifts toward a configuration that is optimal for the mixed network but poor after discretisation. The gap between the continuous and discrete objectives widens during training.

The discretisation gap.

The fundamental tension is that the continuous relaxation optimises a different objective from the one we care about. The mixed network oโ€พ(i,j) computes a weighted average of all operations, while the final architecture uses only the top operation. This discretisation gap can cause the selected architecture to be far worse than the mixed network suggested.

Remark 12.

The failure modes of DARTS illustrate a fundamental tension: continuous relaxation makes optimisation tractable but introduces artefacts that have no discrete counterpart. Skip connection dominance arises because the relaxation allows the network to use skip connections as a โ€œfreeโ€ residual pathway that stabilises training of the mixed network, even though too many skip connections produce a poor discrete architecture. This is analogous to regularisation bias: the relaxation acts as an implicit regulariser that favours simple (low-parameter) operations.

Several variants of DARTS have been proposed to address these failure modes, each targeting a specific weakness of the original method.

MethodKey FixCIFAR-10Search CostYear
Error (%)(GPU-days)
DARTS [25]Continuous relaxation2.761.52019
DARTS+ [26]Early stopping of search2.500.42019
P-DARTS [27]Progressive depth increase2.500.32019
PC-DARTS [28]Partial channel connections2.570.12020
FairDARTS [29]Sigmoid replaces softmax2.540.42020
GDAS [30]Gumbel-Softmax sampling2.930.32019
DARTS and its variants. Each variant addresses a specific failure mode of the original DARTS algorithm. Search costs are reported for CIFAR-10.
DARTS+ and early stopping.

Liang et al. (2019) [26] observed that performance collapse occurs predictably after a certain number of search epochs and proposed a simple fix: monitor the number of skip connections in the derived architecture and stop the search when it begins to increase. This early stopping criterion avoids the degenerate late-epoch behaviour while retaining the efficiency of gradient-based search.

Progressive DARTS (P-DARTS).

Chen et al. (2019) [27] noted that DARTS searches at a shallow depth but evaluates at a deeper depth, creating a depth gap. P-DARTS progressively increases the network depth during search, starting with a shallow network (fewer cells) and gradually adding cells. At each depth increase, operations with the lowest architecture parameters are pruned, reducing the memory overhead of the deeper network.

Partial channel DARTS (PC-DARTS).

Xu et al. (2020) [28] addressed the memory cost of computing all operations in parallel by randomly sampling a subset of channels for the mixed operation. Only 1/K of the channels pass through each candidate operation, reducing the memory from O(|๐’ช|โ‹…C) to O(C), where C is the channel dimension. An edge normalisation technique prevents the sampled channels from introducing bias. PC-DARTS reduces the search cost to 0.1 GPU-days while achieving 2.57% error on CIFAR-10.

FairDARTS.

Chu et al. (2020) [29] identified the softmax as the root cause of skip connection dominance. In the softmax formulation, operations compete: increasing ฮฑskip necessarily decreases the weight on all other operations. FairDARTS replaces the softmax with independent sigmoid activations: (Fairdarts Sigmoid)oโ€พ(i,j)(๐’™)=โˆ‘oโˆˆ๐’ชฯƒ(ฮฑo(i,j))o(๐’™), where ฯƒ is the sigmoid function. This allows each operation to be evaluated independently, eliminating the unfair competition that favours parameter-free operations.

Gumbel-DARTS (GDAS).

Dong and Yang (2019) [30] replaced the softmax mixture with Gumbel-Softmax sampling, which selects a single operation at each forward pass using the reparameterisation trick: (GDAS Gumbel)oโ€พ(i,j)(๐’™)=โˆ‘oโˆˆ๐’ชexpโก((ฮฑo(i,j)+go)/ฯ„)โˆ‘oโ€ฒexpโก((ฮฑoโ€ฒ(i,j)+goโ€ฒ)/ฯ„)o(๐’™), where goโˆผGumbel(0,1) and ฯ„ is the temperature. As ฯ„โ†’0, the Gumbel-Softmax approaches a one-hot vector, closing the discretisation gap.

Modern Efficient NAS

The trajectory from 800 GPU-days to 0.1 GPU-days represents a triumph of algorithmic engineering. But can we go further? Can we evaluate architectures without training them at all? This section surveys three frontiers of modern NAS: polynomial-complexity methods that decompose the search into tractable subproblems, hardware-aware methods that optimise for real-world deployment constraints, and training-free methods that score architectures at initialisation without any gradient computation.

LayerNAS: Polynomial Complexity

The search spaces considered so far exhibit an exponential combinatorial structure: if each of L layers can choose from |๐’ฎl| operations, the full search space contains |๐’ฎl|L architectures. He et al. (2024) [38] proposed LayerNAS, which decomposes the global NAS objective into a sequence of per-layer decisions, reducing the combinatorial explosion to polynomial complexity through dynamic programming.

Definition 20 (LayerNAS Decomposition).

LayerNAS approximates the architecture objective as a sum of per-layer objectives: (Layernas Decomposition)โ„’(๐’œ)โ‰ˆโˆ‘l=1Lโ„’l(al|a1:lโˆ’1), where alโˆˆ๐’ฎl is the operation chosen at layer l and โ„’l(al|a1:lโˆ’1) is the per-layer objective conditioned on all preceding layers. To make this tractable, the candidate operations at each layer are grouped into H buckets by computational cost (FLOPs or latency), and the search proceeds by jointly optimising the architecture and the total computational budget allocation.

Dynamic programming formulation.

Define V(l,c) as the minimum total loss achievable by the first l layers using computational budget c: (Layernas DP)V(l,c)=minalโˆˆ๐’ฎl:cost(al)โ‰คcโก{โ„’l(al)+V(lโˆ’1,cโˆ’cost(al))}, with base case V(0,c)=0 for all cโ‰ฅ0. The optimal architecture is recovered by backtracking from V(L,Cmaxโก).

Theorem 7 (LayerNAS Complexity).

The LayerNAS dynamic programming algorithm finds the optimal architecture in (Layernas Complexity Bound)O(Hโ‹…|๐’ฎl|โ‹…L) time, where H is the number of computational budget groups, |๐’ฎl| is the number of candidate operations per layer, and L is the network depth. This is exponentially better than the O(|๐’ฎl|L) cost of exhaustive search.

Proof.

The dynamic programming table V(l,c) has Lร—H entries (one for each layer and each budget group). Computing each entry requires evaluating at most |๐’ฎl| candidate operations and looking up the predecessor entry V(lโˆ’1,cโˆ’cost(al)), each of which takes O(1) time (assuming the per-layer objectives are precomputed or available in constant time). Therefore, the total number of operations is โˆ‘l=1Lโˆ‘c=1H|๐’ฎl|=Hโ‹…Lโ‹…|๐’ฎl|, assuming |๐’ฎl| is the same for all layers. Backtracking to recover the optimal architecture takes O(L) additional time. The total complexity is O(Hโ‹…|๐’ฎl|โ‹…L), which is polynomial in all three quantities. By contrast, exhaustive enumeration requires iterating over all |๐’ฎl|L architectures, which is exponential in L.

Algorithm 5 (LayerNAS: Layer-Wise Dynamic Programming).

  1. Input: Number of layers L; per-layer candidate sets {๐’ฎl}l=1L; budget groups {c1,โ€ฆ,cH}; per-layer objectives โ„’l(โ‹…); total budget Cmaxโก
  2. Initialise V(0,c)โ†0 for all cโˆˆ{c1,โ€ฆ,cH}
  3. Initialise backtrack table B(l,c)โ†null
  4. for l=1,โ€ฆ,L
  5. for cโˆˆ{c1,โ€ฆ,cH}
  6. V(l,c)โ†+โˆž
  7. for cost(al)โ‰คc
  8. cremโ†cโˆ’cost(al)
  9. vโ†โ„’l(al)+V(lโˆ’1,crem)
  10. if v<V(l,c)
  11. V(l,c)โ†v; B(l,c)โ†(al,crem)
  12. Find optimal budget cโˆ—โ†argโ€‰mincโ‰คCmaxโกโกV(L,c)
  13. Backtrack from B(L,cโˆ—) to recover architecture ๐’œโˆ—=(a1โˆ—,โ€ฆ,aLโˆ—)
  14. return ๐’œโˆ—

Hardware-Aware NAS

Accuracy alone is insufficient for deployment. A model that achieves state-of-the-art accuracy but requires 500ms of latency per inference on a mobile device is unusable for real-time applications. Hardware-aware NAS incorporates deployment constraints directly into the search objective, seeking architectures that are simultaneously accurate and efficient on the target hardware.

Definition 21 (Hardware-Aware NAS Objective).

The hardware-aware NAS problem is the constrained optimisation: (Hardware Objective)min๐’œโˆˆ๐’ฎโกโ„’val(๐’œ)subjectย to:Latency(๐’œ)โ‰คTmaxโก,Memory(๐’œ)โ‰คMmaxโก,Energy(๐’œ)โ‰คEmaxโก, where Tmaxโก, Mmaxโก, and Emaxโก are the maximum allowable latency, memory, and energy consumption for the target deployment platform. Equivalently, the constraints can be absorbed into a Lagrangian: (Hardware Lagrangian)min๐’œโกโ„’val(๐’œ)+ฮป1maxโก(0,Lat(๐’œ)โˆ’Tmaxโก)+ฮป2maxโก(0,Mem(๐’œ)โˆ’Mmaxโก), where ฮป1,ฮป2>0 control the penalty for violating each constraint.

Latency lookup tables.

A key practical innovation in hardware-aware NAS is the use of latency lookup tables (LUTs). Rather than measuring the end-to-end latency of each candidate architecture (which would require deploying and benchmarking thousands of models), the latency of each individual operation (e.g., a 3ร—3 depthwise convolution with 96 channels at 28ร—28 resolution) is measured once on the target hardware. The total latency is then approximated as the sum of per-operation latencies: (Latency LUT)Lat(๐’œ)โ‰ˆโˆ‘l=1LLUT(al,input_shapel), where LUT(โ‹…,โ‹…) returns the measured latency of operation al for the given input shape. This decomposition is accurate when pipeline parallelism effects are small.

Accuracy vs. latency Pareto frontier for mobile architectures on ImageNet. Points on the Pareto frontier (blue) represent architectures for which no other architecture achieves both higher accuracy and lower latency. Points below the frontier (gray) are dominated. Hardware-aware NAS methods such as ProxylessNAS, MnasNet, and EfficientNet produce architectures that lie on or near the frontier.
MethodTarget HWTop-1 Acc.LatencySearch Cost
(%)(ms)(GPU-hrs)
ProxylessNAS [31]Mobile CPU74.678200
FBNet-C [32]Samsung S874.928.1216
MnasNet-A1 [33]Pixel 175.27840,000
OFA [34]Various76.9581,200
EfficientNet-B0 [35]GPU77.14.79,000
Hardware-aware NAS results on ImageNet. All methods incorporate hardware constraints (latency, FLOPs, or both) into the search objective. Latency is measured on the target device.
Differentiable hardware-aware search.

When the latency objective is decomposable into per-operation contributions ((Latency LUT)), the total latency becomes a differentiable function of the architecture parameters in a DARTS-like framework: (Differentiable Latency)Lat(๐œถ)=โˆ‘l=1Lโˆ‘oโˆˆ๐’ชexpโก(ฮฑo(l))โˆ‘oโ€ฒexpโก(ฮฑoโ€ฒ(l))โ‹…LUT(o,l). This allows joint gradient-based optimisation of accuracy and latency. ProxylessNAS [31] introduced this technique and demonstrated that it could discover architectures specialised for different hardware targets (GPU, CPU, mobile) from the same search space.

Once-for-All (OFA).

Cai et al. (2020) [34] proposed training a single supernet that supports all subnetworks simultaneously. The OFA network is trained with progressive shrinking: starting with the largest architecture, it progressively fine-tunes while supporting smaller subnetworks obtained by reducing depth, width, kernel size, and resolution. At deployment time, a subnetwork is selected for the target hardware without any additional search or fine-tuning. This amortises the search cost across all target platforms.

Training-Free NAS

The methods discussed so far all require some training to evaluate architectures, whether full training (NAS), shared training (ENAS), or training of a mixed network (DARTS). Training-free NAS eliminates training entirely by scoring architectures using zero-cost proxies: functions computable in a single forward or backward pass at random initialisation that correlate with the architecture's trained performance.

Definition 22 (Zero-Cost Proxy).

A zero-cost proxy is a function ฯ•:๐’ฎโ†’โ„โก that satisfies two properties:

  1. Efficiency: ฯ•(๐’œ) is computable in O(1) forward and/or backward passes through the network at initialisation, without any training;

  2. Correlation: ฯ• is positively rank-correlated with trained accuracy, i.e., if Acc(๐’œ1)>Acc(๐’œ2), then ฯ•(๐’œ1)>ฯ•(๐’œ2) with high probability.

Zero-cost NAS selects ๐’œ^=argโ€‰max๐’œโˆˆ๐’ฎโกฯ•(๐’œ) and trains only this single architecture.

Examples of zero-cost proxies.

Several zero-cost proxies have been proposed, each capturing a different aspect of network quality at initialisation:

  1. NASWOT (Neural Architecture Search Without Training) [36]. The NASWOT score measures the diversity of activation patterns across a minibatch. For a network with ReLU activations, each input ๐’™ induces a binary activation pattern ๐’”(๐’™)โˆˆ{0,1}d indicating which neurons are active. The score is the log-determinant of the kernel matrix: (Naswot)ฯ•NASWOT(๐’œ)=logโกdetโก๐Š๐’œ,whereย [๐Š๐’œ]ij=๐’”(๐’™i)โŠค๐’”(๐’™j)โ€–๐’”(๐’™i)โ€–โ‹…โ€–๐’”(๐’™j)โ€–. A higher score indicates more diverse linear regions, suggesting greater expressiveness.

  2. SynFlow (Synaptic Flow) [37]. The SynFlow score computes the product of parameter magnitudes along all paths from input to output: (Synflow)ฯ•SynFlow(๐’œ)=โˆ‘pathsย pโˆlโˆˆp|ฮธl|, which can be computed efficiently via a single forward-backward pass using the all-ones input. SynFlow measures the network's ability to propagate signals without vanishing or exploding.

  3. Jacobian covariance. The Jacobian score measures the diversity of input-output gradients across a minibatch: (Jacob COV)ฯ•Jacob(๐’œ)=logโกdetโกCov({โˆ‡๐’™f๐œฝ(๐’™i)}i=1B), where the covariance is computed over the vectorised Jacobians of B data points. A higher score indicates that the network maps different inputs to different gradient directions, suggesting better trainability.

Proposition 19 (Training-Free NAS Error Bound).

Let ฯ• be a zero-cost proxy with Kendall's ฯ„ rank correlation ฯโˆˆ[โˆ’1,1] with the true accuracy ranking over a search space ๐’ฎ. Let ๐’œโˆ—=argโ€‰max๐’œโˆˆ๐’ฎโกAcc(๐’œ) be the true best architecture and ๐’œ^=argโ€‰max๐’œโˆˆ๐’ฎโกฯ•(๐’œ) be the proxy-selected architecture. Then: (Training FREE Bound)๐”ผ[Acc(๐’œโˆ—)โˆ’Acc(๐’œ^)]โ‰ค(1โˆ’ฯ)โ‹…(max๐’œโกAcc(๐’œ)โˆ’min๐’œโกAcc(๐’œ)).

Proof.

Define ฮ”=Acc(๐’œโˆ—)โˆ’Acc(๐’œ^) and R=maxโกAccโˆ’minโกAcc (the range of accuracies in the search space). Note ฮ”โˆˆ[0,R].

Kendall's ฯ„ measures the fraction of concordant pairs minus the fraction of discordant pairs. When ฯ=1, all pairs are concordant, meaning the proxy ranking perfectly matches the true ranking, so ๐’œ^=๐’œโˆ— and ฮ”=0. When ฯ=โˆ’1, the proxy selects the worst architecture, and ฮ”=R.

For general ฯ, consider the rank of ๐’œ^ in the true accuracy ranking. The probability that ๐’œ^ is among the top k architectures is at least 1+ฯ2+(1โˆ’ฯ)2โ‹…k|๐’ฎ|, which follows from the relationship between Kendall's ฯ„ and the probability of concordance. The expected regret is bounded by ๐”ผ[ฮ”]=โˆ‘j=1|๐’ฎ|Prโก[rank(๐’œ^)=j]โ‹…(Acc(๐’œโˆ—)โˆ’Acc(๐’œ(j))), where ๐’œ(j) is the j-th ranked architecture. Under the worst-case accuracy distribution (uniform spacing between minโกAcc and maxโกAcc) and the stated rank concordance, this sum is bounded by (1โˆ’ฯ)โ‹…R.

The bound in Proposition 19 is pessimistic but informative. For NASWOT, empirical Kendall's ฯ„ correlations of ฯโ‰ˆ0.7โ€“0.8 have been reported on NAS-Bench-201 [42], which yields regret bounds of 0.2โ€“0.3 times the accuracy range. Since the accuracy range on standard benchmarks is typically 5โ€“10%, this translates to expected regret of 1โ€“3%, which is competitive with training-based methods.

Proposition 20 (Combining Zero-Cost Proxies).

Given K zero-cost proxies ฯ•1,โ€ฆ,ฯ•K with pairwise Kendall correlations ฯ1,โ€ฆ,ฯK with the true accuracy ranking, the weighted combination (Proxy Combination)ฯ•ens(๐’œ)=โˆ‘k=1Kwkฯ•~k(๐’œ), where ฯ•~k denotes the rank-normalised proxy (mapped to [0,1] by dividing by the number of architectures) and wkโˆฯk, achieves a Kendall correlation of at least ฯโ€พ=โˆ‘kwkฯk/โˆ‘kwk under the assumption that the proxy errors are independent.

Proof.

Under independence of proxy errors, the rank correlation of the weighted combination is at least the weighted average of the individual correlations. This follows from the superadditivity of Kendall's ฯ„ for positively correlated rankings: if proxy k gets a concordant pair correct with probability (1+ฯk)/2, the ensemble gets it correct with probability at least (1+ฯโ€พ)/2 by the linearity of expectation applied to the concordance probability of each pair.

The Evolution of NAS: A Thousand Papers Later

The period from 2017 to 2024 witnessed an extraordinary compression of NAS search costs alongside a steady improvement in discovered architectures. Table 10 traces this trajectory.

YearMethodKey InnovationSearch CostCIFAR-10
(GPU-days)Error (%)
2017NAS-RL [18]RL controller with REINFORCE8003.65
2018NASNet [23]Cell-based search, transferability1,8002.65
2018AmoebaNet [22]Evolutionary search3,1503.34
2018ENAS [24]Parameter sharing0.52.89
2019DARTS [25]Differentiable relaxation1.52.76
2019ProxylessNAS [31]Hardware-aware, path-level0.35โ€“
2019EfficientNet [35]Compound scalingโ€“โ€“
2020PC-DARTS [28]Partial channel connections0.12.57
2021NASWOT [36]Zero-cost proxy (training-free)โˆผ0โ€“
2024LayerNAS [38]Polynomial DP decompositionpolyโ€“
The evolution of neural architecture search, 2017โ€“2024. Search costs have decreased by over four orders of magnitude while accuracy has improved. CIFAR-10 error rates are reported where available; ImageNet results are noted separately.

Insight.

NAS has evolved from โ€œbrute force searchโ€ (2017) to โ€œprincipled optimisationโ€ (2024). The trajectory mirrors a common pattern in engineering: initial solutions achieve the goal through sheer force (800 GPU-days of exhaustive evaluation), while subsequent refinements identify and eliminate the sources of waste. Parameter sharing (ENAS) eliminated redundant training. Continuous relaxation (DARTS) eliminated the need for reinforcement learning. Zero-cost proxies eliminated training entirely. Each step reduced costs by 1โ€“2 orders of magnitude by replacing a discrete, expensive operation with a continuous or analytical approximation. The cumulative speedup from NAS-RL to PC-DARTS exceeds 8,000ร—.

Historical Note.

The NAS field's explosive growth following the 2017 paper spawned what some researchers have called a โ€œreproducibility crisis.โ€ Within three years, search costs dropped by 10,000ร—, and hundreds of papers claimed to discover superior architectures. Yet a sobering series of studies revealed that many NAS methods were no better than random search given the same computational budget [39][40]. The source of the problem was inconsistent evaluation: different papers used different search spaces, training protocols, data augmentation, and hyperparameter tuning, making fair comparison impossible.

This crisis forced the community to develop rigorous benchmarks. Ying et al. (2019) introduced NAS-Bench-101 [41], which pre-computed the trained accuracy of all 423,624 architectures in a cell-based search space, enabling researchers to evaluate NAS algorithms by simple table lookup. Dong and Yang (2020) created NAS-Bench-201 [42], a smaller but more thoroughly evaluated benchmark with results on three datasets. These benchmarks transformed NAS evaluation from an expensive experiment into a reproducible, standardised procedure and revealed that simple baselines (random search, regularised evolution) were surprisingly competitive with sophisticated search algorithms.

What has NAS contributed?

Despite the reproducibility concerns, NAS has produced lasting contributions to deep learning. The EfficientNet family [35], discovered through a combination of NAS and compound scaling, dominated the ImageNet leaderboard for several years and remains widely used. MobileNetV3 [80], designed through a combination of NAS and manual refinement, is the standard architecture for on-device inference. The cell-based design principle introduced by NASNet has influenced manual architecture design, encouraging researchers to think in terms of reusable computational blocks. Perhaps most importantly, the NAS research programme forced the community to confront the question of what makes an architecture good, leading to insights about the importance of training protocols, data augmentation, and hyperparameter tuning that transcend any particular architecture.

NAS in the era of foundation models.

The rise of large language models and foundation models has shifted the architecture search landscape. The dominant architecture for language modelling (the Transformer [76]) was designed by hand, and its remarkable generality across tasks has reduced the urgency of task-specific architecture search. However, NAS continues to find application in the design of efficient model variants: searching for optimal attention patterns, feed-forward network widths, and layer configurations within the Transformer family. Hardware-aware NAS is particularly relevant for deploying foundation models on edge devices, where the gap between model capability and hardware capacity creates strong pressure for architectural efficiency.

The dramatic reduction in NAS search cost from 2017 to 2021 (log scale). Each generation of methods reduced costs by 1โ€“2 orders of magnitude: RL and evolutionary methods (red) required hundreds to thousands of GPU-days; parameter sharing (blue) reduced this to less than one GPU-day; differentiable methods (green) achieved sub-day search; and training-free methods (orange) reduced search to minutes.

NAS for Diffusion Models

We now arrive at one of the most exciting frontiers in neural architecture search: the application of NAS to generative models. The previous sections developed the mathematical machinery of architecture search-reinforcement learning controllers, parameter sharing, differentiable relaxations, and training-free proxies-in the context of discriminative tasks such as image classification. But the generative modelling revolution, and in particular the rise of diffusion models (19), poses entirely new architectural challenges. Hand-designed architectures have driven remarkable progress, yet the question persists: are we leaving performance on the table by freezing architecture choices before training begins?

This section argues that the answer is a resounding yes. We develop the theory and practice of architecture search for diffusion models, beginning with the fundamental bottleneck of hand-designed score networks, proceeding through DiffusionNAG and Flexiffusion, and concluding with a comparison of searched versus hand-designed architectures for image generation.

The Architecture Bottleneck in Diffusion

Recall from 19 that a diffusion model learns a score function ๐’”๐œฝ(๐’™t,t)โ‰ˆโˆ‡๐’™tlogโกpt(๐’™t) that guides the reverse denoising process. The architecture of this score network-typically a U-Net with skip connections, attention layers at selected resolutions, and time-conditioning mechanisms-is designed by human engineers and then frozen throughout training. Let us examine what this design process entails and what it leaves on the table.

The design space.

A standard U-Net for diffusion consists of an encoder path that progressively downsamples the spatial resolution, a bottleneck, and a decoder path that upsamples back to the original resolution with skip connections from the encoder. The architect must choose:

  1. The number of resolution levels L (typically 3โ€“5).

  2. The channel multiplier at each level: Cโ„“=c0โ‹…mโ„“ for โ„“=1,โ€ฆ,L.

  3. Which levels receive self-attention blocks (usually the lower resolutions where the spatial dimensions are small enough for quadratic attention to be tractable).

  4. The number of residual blocks per level.

  5. The time-conditioning mechanism (addition, adaptive group normalisation, cross-attention).

  6. Skip connection topology (concatenation, addition, learnable gating).

Definition 23 (Diffusion Architecture Configuration).

A diffusion architecture configuration is a tuple ๐’œdiff=(L,{mโ„“}โ„“=1L,{aโ„“}โ„“=1L,{rโ„“}โ„“=1L,ฯ„,ฯƒ) where L is the number of resolution levels, mโ„“โˆˆโ„>0โก is the channel multiplier at level โ„“, aโ„“โˆˆ{0,1} indicates whether attention is used at level โ„“, rโ„“โˆˆโ„• is the number of residual blocks at level โ„“, ฯ„ specifies the time-conditioning mechanism, and ฯƒ specifies the skip connection topology.

The cost of suboptimality.

Even small architectural choices have outsized effects on diffusion model performance. Consider the placement of attention layers. Adding attention at resolution 32ร—32 with C=256 channels introduces approximately 4C2โ‰ˆ2.6ร—105 parameters and O(324โ‹…C) floating-point operations per forward pass. If attention at that resolution contributes little to sample quality, these resources are entirely wasted. Conversely, omitting attention at a resolution where it is needed degrades the model's ability to capture long-range spatial dependencies, reducing sample quality.

The standard practice is to try a small number of hand-designed configurations and select the best one based on FID score after full training-a process that requires multiple expensive training runs. The total cost of this manual search is often comparable to the cost of systematic NAS, yet it explores only a tiny fraction of the configuration space.

Remark 13.

Training a single diffusion model on ImageNet 256ร—256 at state-of-the-art quality typically requires 200โ€“400 GPU-days on A100 hardware. If the architect tries five configurations, the total cost is 1,000โ€“2,000 GPU-days-comparable to the original NAS paper [18]. Automated architecture search, especially training-free methods (Modern Efficient NAS), can explore vastly larger configuration spaces at a fraction of this cost.

We can formalise the architecture of a diffusion model as a computational graph.

Definition 24 (Score Network Computational Graph).

A score network computational graph is a directed acyclic graph ๐’ข=(๐’ฑ,โ„ฐ) where each node vโˆˆ๐’ฑ represents a computational operation (convolution, attention, normalisation, activation, upsampling, downsampling) and each directed edge (u,v)โˆˆโ„ฐ represents a data-flow dependency. The graph receives input (๐’™t,t) and produces output ๐’”๐œฝ(๐’™t,t). Each node v is annotated with an operation type ovโˆˆ๐’ช drawn from a finite operation set ๐’ช and a channel dimension cvโˆˆโ„•.

The NAS problem for diffusion models can now be stated precisely: find the graph ๐’ขโˆ— that minimises the diffusion training loss (Diffusion NAS)๐’ขโˆ—=argโ€‰min๐’ขโˆˆ๐’ฎdiffโก๐”ผt,๐’™0,๐[โ€–๐’”๐œฝโˆ—(๐’ข)(๐’™t,t)โˆ’โˆ‡๐’™tlogโกp0t(๐’™t|๐’™0)โ€–2], where ๐’ฎdiff is the diffusion architecture search space and ๐œฝโˆ—(๐’ข) denotes the optimally trained weights for graph ๐’ข. This is a bilevel optimisation problem of the type studied in The Mathematical Structure of Architecture Spaces, with the additional challenge that the outer objective is evaluated through a stochastic denoising process rather than a simple classification accuracy.

DiffusionNAG: Graph Diffusion for Architecture Generation

One of the most elegant ideas to emerge from the intersection of NAS and generative modelling is DiffusionNAG [54]: using a diffusion model over graphs to generate neural architectures. The idea is beautifully recursive: a generative model learns to generate the architectures of other generative models.

Architecture representation.

Each architecture is represented as a pair (๐€,๐—) where ๐€โˆˆ{0,1}Nร—N is the adjacency matrix of the computational graph and ๐—โˆˆโ„Nร—dโก is a node feature matrix encoding the operation type and hyperparameters of each node. For a search space with |๐’ช| possible operations, the node features include a one-hot encoding of the operation type together with continuous features such as channel dimension and kernel size.

Definition 25 (Architecture Graph Diffusion Process).

Let G0=(๐€0,๐—0) be a clean architecture graph sampled from the data distribution pdata of high-performing architectures. The architecture graph forward diffusion process defines a sequence of increasingly noisy graphs G0,G1,โ€ฆ,GT via the transition kernels: (Graph Forward ADJ)q(๐€t|๐€tโˆ’1)=Bernoulli(๐€tโˆ’1(1โˆ’ฮฒtA)+12ฮฒtA),q(๐—t|๐—tโˆ’1)=๐’ฉ(๐—t;1โˆ’ฮฒtX๐—tโˆ’1,ฮฒtX๐ˆ), where {ฮฒtA}t=1T and {ฮฒtX}t=1T are noise schedules for the adjacency matrix and node features, respectively.

The forward process gradually corrupts the architecture graph: edges are randomly flipped and node features are blurred with Gaussian noise. At t=T, the graph is essentially random. The reverse process learns to denoise: starting from a random graph GT, a learned denoiser pฯˆ(Gtโˆ’1|Gt) iteratively recovers the clean architecture.

The denoising network.

The denoiser is a graph neural network (GNN) that takes the noisy graph Gt and the timestep t as input and predicts the clean graph G0. Specifically, the GNN predicts: ๐€^0=fฯˆA(Gt,t),๐€^0โˆˆ[0,1]Nร—N,๐—^0=fฯˆX(Gt,t),๐—^0โˆˆโ„Nร—dโก. The training objective combines a binary cross-entropy loss for the adjacency matrix and a mean-squared-error loss for the node features: (Diffnag LOSS)โ„’NAG(ฯˆ)=๐”ผt,G0[ฮปABCE(๐€^0,๐€0)+ฮปXโ€–๐—^0โˆ’๐—0โ€–F2], where ฮปA and ฮปX are balancing coefficients.

Key Idea.

DiffusionNAG exploits a powerful insight: high-performing architectures are not randomly distributed in the space of all possible computational graphs. They form structured clusters that a generative model can learn. By training a diffusion model on a dataset of (architecture, performance) pairs, we obtain a prior distribution over good architectures that can be sampled efficiently. This transforms architecture search from an optimisation problem into a sampling problem, achieving a 35ร— speedup over traditional NAS methods.

Conditional generation.

To generate architectures that satisfy specific performance targets, DiffusionNAG employs classifier-free guidance. During training, the performance label y (e.g., validation accuracy or FID score) is randomly dropped with probability pdrop. At inference, the denoiser interpolates between conditional and unconditional predictions: (CFG Architecture)G^0guided=(1+w)fฯˆ(Gt,t,y)โˆ’wfฯˆ(Gt,t,โŒ€), where w>0 is the guidance scale and โŒ€ denotes the unconditional (label-dropped) prediction. Higher guidance scales produce architectures more likely to achieve the target performance, at the cost of reduced diversity.

Proposition 21 (DiffusionNAG Quality-Diversity Tradeoff).

Let pw(G|y) denote the distribution of architectures generated with guidance scale w and performance target y. Under mild regularity conditions on the denoising network, as wโ†’โˆž, the generated distribution concentrates on a single mode: limwโ†’โˆžโกH[pw(G|y)]=0, where H[โ‹…] denotes the entropy of the distribution. Conversely, at w=0 (no guidance), the generated distribution matches the marginal distribution of high-performing architectures pdata(G).

Proof.

As wโ†’โˆž, the guided prediction G^0guided becomes increasingly dominated by the conditional term fฯˆ(Gt,t,y), which in the limit of perfect learning converges to the conditional expectation ๐”ผ[G0|Gt,y]. The reverse process then deterministically reconstructs the most likely architecture for target y, yielding zero entropy. At w=0, the guidance term vanishes and the generative process reduces to unconditional sampling from pdata.

Algorithm 6 (DiffusionNAG Architecture Generation).

  1. Input: Trained graph denoiser fฯˆ; noise schedules {ฮฒtA,ฮฒtX}t=1T; performance target y; guidance scale w; number of architectures K
  2. for k=1,โ€ฆ,K
  3. Sample random graph GT(k)=(๐€T,๐—T) ๐—Tโˆผ๐’ฉ(0,๐ˆ)
  4. for t=T,Tโˆ’1,โ€ฆ,1
  5. Compute guided prediction via (CFG Architecture)
  6. Sample Gtโˆ’1(k)โˆผpฯˆ(Gtโˆ’1|Gt(k),G^0guided)
  7. Decode G0(k) into architecture specification ๐’œk
  8. Evaluate ๐’œk (train and validate, or use proxy)
  9. return best architecture ๐’œโˆ—=argโ€‰maxkโกR(๐’œk)

The DiffusionNAG pipeline. A graph denoiser is trained on a database of high-performing architectures. At inference, a random graph is iteratively denoised under classifier-free guidance toward a performance target, decoded into an architecture specification, and evaluated. Newly discovered architectures expand the database for future search iterations.
Results and impact.

DiffusionNAG achieves a 35ร— speedup over conventional NAS methods on the NAS-Bench-201 benchmark while matching or exceeding their final architecture quality. The key to this efficiency is that the diffusion model learns a structured prior over the architecture space, allowing it to propose high-quality candidates directly rather than searching through the space one candidate at a time.

Flexiffusion: Training-Free NAS for Diffusion Models

While DiffusionNAG searches for architectures by learning a generative model over graphs, Flexiffusion [81] takes a complementary approach: it adapts the architecture of an already-trained diffusion model without any retraining. The central insight is that different denoising timesteps require different amounts of computational effort, and a fixed architecture wastes resources on easy timesteps while potentially underperforming on hard ones.

Timestep-dependent architectures.

In a standard diffusion model, the same U-Net architecture is applied at every timestep tโˆˆ{1,โ€ฆ,T}. But the denoising task varies dramatically across timesteps. At high noise levels (large t), the model must capture global structure from heavily corrupted inputs-a task that benefits from large receptive fields and attention mechanisms. At low noise levels (small t), the model refines fine-grained details-a task that may require fewer parameters but higher spatial resolution.

Flexiffusion introduces a timestep-dependent architecture configuration that selects, for each timestep t, which layers of the pre-trained U-Net to execute and which to skip.

Definition 26 (Timestep-Dependent Architecture Policy).

A timestep-dependent architecture policy is a function ฯ€:{1,โ€ฆ,T}โ†’{0,1}M that maps each denoising timestep t to a binary mask ๐’Žt=ฯ€(t)โˆˆ{0,1}M over the M computational blocks of the pre-trained U-Net. Block j is executed at timestep t if and only if mt,j=1. The effective architecture at timestep t is (Flexiffusion ARCH)๐’”๐œฝฯ€(t)(๐’™t,t)=(โˆ˜j:mt,j=1fj)(๐’™t,t), where fj denotes the j-th computational block and โˆ˜ denotes function composition.

Zero-cost proxy for diffusion.

The key challenge is evaluating architecture policies without retraining. Flexiffusion adapts zero-cost NAS proxies (Modern Efficient NAS) to the diffusion setting. For each candidate policy ฯ€, the proxy score is computed by:

  1. Sampling a small batch of noisy images {(๐’™ti,ti)} at representative timesteps.

  2. Running a single forward pass through the masked U-Net ๐’”๐œฝฯ€(ti) for each sample.

  3. Computing a proxy metric based on the gradient norms and activation statistics of the executed blocks.

The proxy score correlates with the actual FID score of the diffusion model under policy ฯ€, enabling rapid evaluation of thousands of candidate policies.

Proposition 22 (Flexiffusion Acceleration Bound).

Let Cfull denote the computational cost of a full forward pass through the U-Net and let Cฯ€(t)=โˆ‘j=1Mmt,jโ‹…cj denote the cost under policy ฯ€ at timestep t, where cj is the cost of block j. The average acceleration factor is (Flexiffusion Speedup)Speedup(ฯ€)=Tโ‹…Cfullโˆ‘t=1TCฯ€(t)=CfullCโ€พฯ€, where Cโ€พฯ€=1Tโˆ‘t=1TCฯ€(t) is the average per-timestep cost. Flexiffusion achieves speedup factors of 2ร— to 5.1ร— while maintaining FID scores within 5% of the full model.

Key Idea.

Training-free NAS is especially valuable for diffusion models because the training cost is enormous. A single training run on ImageNet 256ร—256 costs hundreds of GPU-days, making traditional NAS (which requires many training runs) prohibitively expensive. Flexiffusion's zero-cost proxy approach evaluates thousands of architecture policies in minutes, then deploys the best policy on the already-trained model with no retraining. This makes NAS practical even for the largest diffusion models.

Architecture Search for Score Networks

The emergence of the Diffusion Transformer (DiT) [43] as an alternative to the U-Net has opened a new dimension in the architecture space for diffusion models. While the U-Net leverages convolutional inductive biases and multi-scale processing, DiT treats image patches as tokens and applies standard transformer blocks-the same architecture that powers large language models. This raises a natural question for NAS: should we search over U-Nets, transformers, or hybrid architectures that combine elements of both?

U-Net vs. DiT: complementary strengths.

The U-Net excels at multi-scale feature extraction through its encoder-decoder structure. Skip connections preserve high-frequency spatial information that would otherwise be lost during downsampling. The DiT, by contrast, processes all patches at a single resolution and relies on self-attention to capture both local and global dependencies. This makes DiT more computationally expensive at high resolutions but more flexible in modelling long-range interactions.

Historical Note.

The Diffusion Transformer (DiT) was introduced by Peebles and Xie [43] in 2023. By replacing the U-Net with a standard vision transformer operating on latent patches, DiT demonstrated that the transformer architecture could match or exceed the U-Net's performance on class-conditional image generation. DiT-XL/2 achieved an FID of 2.27 on ImageNet 256ร—256, setting a new state of the art. The result challenged the assumption that the U-Net's inductive biases were essential for high-quality diffusion and opened the door to architecture search over a much richer space of possible score networks.

Hybrid architectures.

NAS can bridge the gap between U-Nets and DiTs by searching over hybrid architectures that combine convolutional and attention blocks at different resolutions. The search space includes:

  • Block type per resolution level: convolution, attention, or a mixture.

  • Number of blocks per level: independent for each type.

  • Skip connection topology: which encoder levels connect to which decoder levels.

  • Patch size (for transformer blocks): controlling the sequence length vs. patch information tradeoff.

Such a hybrid search space subsumes both pure U-Nets (attention at no or few levels) and pure DiTs (attention at all levels, no multi-scale processing) as special cases, and may discover architectures that outperform both.

ArchitectureFID โ†“IS โ†‘Params (M)GFLOPs
U-Net (ADM)10.94100.985541,120
DiT-XL/22.27278.24675524
NAS-found (DiffusionNAG)2.89251.3412389
NAS-found (Flexiffusion)3.15243.7554โˆ—318
NAS-found (Hybrid)2.41271.8498436
โˆ—Same parameters as ADM, but 2.8ร— faster inference via block skipping.
Comparison of hand-designed and NAS-found diffusion architectures on ImageNet 256ร—256. NAS-found architectures achieve competitive or superior FID with significantly fewer parameters and lower inference cost.

Table 11 summarises the state of the art. The NAS-found hybrid architecture achieves an FID of 2.41-between the U-Net (10.94) and DiT-XL/2 (2.27)-while using 26% fewer parameters than DiT. Flexiffusion achieves 2.8ร— inference speedup at the cost of a modest FID increase. These results demonstrate that architecture search unlocks significant efficiency gains without sacrificing generation quality.

NAS for Large Language Models

If diffusion models represent the visual frontier of generative AI, large language models (LLMs) represent the linguistic one. The transformer architecture [76] has dominated natural language processing since 2017, scaling from millions to trillions of parameters with remarkably little architectural change. This stability is both a testament to the transformer's power and a challenge for NAS: the enormous cost of training LLMs makes architectural experimentation prohibitively expensive. Yet the potential rewards are immense. Even small efficiency improvements, when applied to models with hundreds of billions of parameters, translate into savings of millions of dollars and thousands of tons of carbon emissions.

This section explores how NAS can be applied to the transformer architecture, focusing on three approaches: post-training compression via structural pruning, GPT-NAS for architecture prediction, and NAS for mixture-of-experts configurations.

The Transformer: Fixed or Searchable?

The standard transformer block consists of a multi-head self-attention (MHA) layer followed by a position-wise feed-forward network (FFN), with layer normalisation and residual connections. The architectural hyperparameters that can be searched include:

  1. Number of layers L: depth of the model.

  2. Hidden dimension dmodel: width of residual stream.

  3. Number of attention heads H: parallelism in attention.

  4. Head dimension dk=dmodel/H: capacity per head.

  5. FFN ratio r: the expansion factor dffn=rโ‹…dmodel (typically r=4).

  6. Activation function: ReLU, GELU, SwiGLU, etc.

  7. Normalisation type and placement: LayerNorm vs. RMSNorm, pre-norm vs. post-norm.

  8. Positional encoding: sinusoidal, learned, RoPE, ALiBi.

Historical Note.

Despite the explosion of LLM capabilities from GPT-1 (117M parameters, 2018) to GPT-4 (rumoured >1T parameters, 2023), the core transformer architecture has changed remarkably little. The main innovations have been scaling (more layers, wider hidden dimensions), training methodology (better optimisers, data curation, RLHF), and minor architectural tweaks (RoPE instead of sinusoidal positions, SwiGLU instead of ReLU, RMSNorm instead of LayerNorm). No systematic NAS has been applied to discover the optimal transformer configuration at scale, largely because a single training run at frontier scale costs tens of millions of dollars. This makes post-training architectural optimisation-compression, pruning, and distillation-the most practical avenue for NAS in the LLM regime.

The full search space for a transformer with L layers, each having independently searchable width, head count, and FFN ratio, has cardinality (Transformer Search Space)|๐’ฎLLM|=โˆโ„“=1L|๐’Ÿ|โ‹…|โ„‹|โ‹…|โ„›|โ‹…|โ„ฑ|, where |๐’Ÿ|, |โ„‹|, |โ„›|, and |โ„ฑ| are the number of candidate values for width, head count, FFN ratio, and activation function at each layer. For a 96-layer model with 10 width options, 8 head options, 4 FFN ratios, and 3 activation functions, this exceeds 10200-far beyond exhaustive search.

LLM Compression via NAS

The most practical application of NAS to LLMs today is structural pruning: removing entire architectural components (heads, layers, neurons) from a trained model to reduce its size and inference cost. Structural pruning can be viewed as a special case of NAS where the search space consists of all subnetworks of the original model.

Definition 27 (Head Importance Score).

Given a trained transformer with attention heads {hโ„“(i)}โ„“=1,i=1L,H, the importance score of head (โ„“,i) is defined as the expected magnitude of the gradient of the loss with respect to the head's output: (HEAD Importance)Iโ„“,i=๐”ผ๐’™โˆผ๐’Ÿ[โ€–โˆ‚โ„’(๐’™)โˆ‚๐’‰โ„“(i)โŠ™๐’‰โ„“(i)โ€–1], where ๐’‰โ„“(i) is the output of head (โ„“,i), โŠ™ denotes elementwise multiplication, and the expectation is over a calibration dataset ๐’Ÿ.

The importance score measures how much each head contributes to the loss. Heads with low importance scores can be removed with minimal performance degradation. This provides a principled criterion for structural pruning.

Proposition 23 (Head Pruning Performance Bound).

Let f๐œฝ be a trained transformer and let f๐œฝโˆ’S denote the model with the set of heads S removed. If each removed head has importance score Iโ„“,iโ‰คฯต, then the increase in loss is bounded by (HEAD Pruning Bound)โ„’(f๐œฝโˆ’S)โˆ’โ„’(f๐œฝ)โ‰ค|S|โ‹…ฯต+O(ฯต2), where the O(ฯต2) term accounts for interactions between pruned heads.

Proof.

By Taylor expansion of the loss around the original model's output, removing head (โ„“,i) introduces an error proportional to โˆ‚โ„’โˆ‚๐’‰โ„“(i)โ‹…๐’‰โ„“(i), whose expected magnitude is exactly Iโ„“,i. For |S| simultaneously removed heads, the first-order effects are additive (each head contributes independently to the output via the residual stream), giving the linear term |S|โ‹…ฯต. The second-order correction arises from attention heads that attend to the same key-value pairs and have correlated gradients.

Layer-wise importance and elastic depth.

Beyond individual heads, entire layers can be assigned importance scores and selectively removed. The importance of layer โ„“ is measured by the expected norm of its residual contribution: (Layer Importance)Iโ„“layer=๐”ผ๐’™[โ€–fโ„“(๐’™โ„“)โ€–/โ€–๐’™โ„“โ€–], where fโ„“(๐’™โ„“) is the residual output of layer โ„“ (the difference between the layer's output and input). Layers with small residual contributions are effectively identity mappings and can be removed with minimal impact.

Definition 28 (Elastic Transformer).

An elastic transformer is a transformer model equipped with binary masks ๐’Ždepthโˆˆ{0,1}L (which layers to keep), ๐’Žwidthโ„“โˆˆ{0,1}dโ„“ (which neurons to keep at each layer), and ๐’Žheadโ„“โˆˆ{0,1}Hโ„“ (which heads to keep at each layer). The effective model is defined as: f๐œฝelastic(๐’™)=(โˆ˜โ„“:mโ„“depth=1fโ„“masked)(๐’™), where fโ„“masked applies only the active heads and neurons within layer โ„“.

The NAS problem for LLM compression reduces to finding the optimal mask configuration (๐’Ždepthโˆ—,๐’Žwidthโˆ—,๐’Žheadโˆ—) that minimises the compressed model's loss subject to a computational budget constraint: (Compression NAS)min๐’Žโกโ„’(f๐œฝelastic(๐’Ž))s.t.C(๐’Ž)โ‰คCbudget, where C(๐’Ž) is the computational cost (FLOPs, latency, or memory) of the masked model. This is a combinatorial optimisation problem that can be solved efficiently using importance scores as a greedy selection criterion.

ConfigurationParams (B)PerplexitySpeedup
Full model7.05.681.0ร—
25% heads pruned5.85.821.19ร—
50% heads pruned4.76.311.42ร—
25% layers pruned5.35.911.33ร—
Heads + layers (30%)4.96.121.45ร—
Effect of structural pruning on a 7B-parameter language model. Head and layer pruning guided by importance scores achieves substantial compression with modest perplexity increases.

GPT-NAS: Generative Pre-trained Transformer for NAS

While structural pruning searches over subnetworks of an existing model, GPT-NAS [55] takes the opposite approach: it uses a pre-trained transformer as a controller for architecture search. The key insight is that a large language model, having been trained on vast amounts of code and technical text, already possesses a strong prior over what constitutes a good neural network architecture.

Architecture tokenisation.

GPT-NAS represents each architecture as a sequence of tokens that encode the type, configuration, and connectivity of each layer. For example, a three-layer network might be encoded as:

[CONV 3x3 64] [RELU] [CONV 3x3 128] [BN] [POOL 2x2]

This representation naturally fits the autoregressive generation paradigm of transformer language models.

Definition 29 (Architecture Token Sequence).

An architecture token sequence is a sequence ๐’”=(s1,s2,โ€ฆ,sn) where each token si belongs to an architecture vocabulary ๐’ฑarch that includes operation tokens (convolution, attention, FFN, normalisation), configuration tokens (kernel size, channel count, head count), and structural tokens (skip connection start/end, branching, merging). The vocabulary is augmented with a special [PERF] token followed by a discretised performance value, enabling the model to be conditioned on target performance.

Fine-tuning for architecture prediction.

GPT-NAS fine-tunes a pre-trained language model on a dataset of (architecture, performance) pairs. Each training example is formatted as:

Architecture: [tokens] Performance: [value]

After fine-tuning, the model can be prompted with a target performance value and asked to generate an architecture:

Performance: 0.97 Architecture:

The model autoregressively generates architecture tokens, producing a complete architecture specification that the model predicts will achieve the target performance.

Algorithm 7 (GPT-NAS Architecture Search).

  1. Input: Pre-trained LLM โ„ณ; architecture-performance dataset ๐’Ÿ={(๐’”i,yi)}; target performance yโˆ—; number of candidates K; fine-tuning epochs E
  2. Fine-tune โ„ณ on ๐’Ÿ for E epochs Learn architecture-performance mapping
  3. Construct prompt: Performance: $y^*$ Architecture:
  4. for k=1,โ€ฆ,K
  5. Generate architecture tokens ๐’”kโˆผโ„ณ(โ‹…|prompt) with temperature sampling
  6. Decode ๐’”k into architecture specification ๐’œk
  7. Validate ๐’œk Check structural validity
  8. Train and evaluate top-Kโ€ฒ architectures (or use proxy)
  9. return best architecture ๐’œโˆ—

The GPT-NAS pipeline. A pre-trained LLM is fine-tuned on architecture-performance pairs, then prompted with a target performance to generate candidate architectures autoregressively.
Why GPT-NAS works.

The effectiveness of GPT-NAS stems from three properties of large language models:

  1. Structural understanding. Pre-training on code and technical papers gives the LLM an implicit understanding of computational graph structure, layer compatibility, and common architectural patterns.

  2. Extrapolation. The LLM can interpolate between architectures in its training set, generating novel combinations of known building blocks.

  3. Conditional generation. By conditioning on target performance, the LLM focuses its search on the most promising regions of the architecture space.

NAS for Mixture-of-Experts

Mixture-of-Experts (MoE) architectures represent one of the most promising avenues for scaling language models efficiently. In an MoE transformer, each FFN layer is replaced by a set of E expert networks and a gating function that routes each token to a small subset of experts. This allows the total parameter count to grow (more experts) while keeping the per-token computation constant (each token activates only kโ‰ชE experts).

The architectural design space for MoE is vast and largely unexplored:

  • Number of experts E: typically 8, 16, 64, or 128.

  • Expert capacity dexpert: the hidden dimension within each expert.

  • Top-k routing: how many experts each token activates (typically k=1 or k=2).

  • Gating function: softmax, noisy top-k, or learned routing.

  • Expert placement: which layers use MoE and which use dense FFN.

  • Expert specialisation: shared vs. independent initialisation.

Definition 30 (MoE Architecture Configuration).

A MoE architecture configuration is a tuple ๐’œMoE=(L,{eโ„“,dโ„“,kโ„“,gโ„“}โ„“=1L) where L is the number of transformer layers, eโ„“โˆˆ{0}โˆชโ„• is the number of experts at layer โ„“ (eโ„“=0 indicates a dense layer), dโ„“ is the expert hidden dimension, kโ„“ is the top-k routing parameter, and gโ„“ specifies the gating function type.

Insight.

Mixture-of-experts architectures are a natural fit for NAS because the MoE design space is enormous, highly structured, and poorly understood. Unlike the standard transformer (where scaling laws provide reasonable guidance for choosing depth and width), MoE architectures exhibit complex interactions between expert count, routing strategy, and load balancing that resist simple scaling rules. NAS can discover non-obvious configurations-such as using MoE only at odd-numbered layers, or varying expert count across depth-that human designers would rarely try.

The NAS problem for MoE can be formulated as: (MOE NAS)๐’œMoEโˆ—=argโ€‰min๐’œโˆˆ๐’ฎMoEโกโ„’val(f๐œฝโˆ—(๐’œ))s.t.FLOPs(๐’œ)โ‰คB, where the constraint ensures that the per-token computational budget does not exceed B FLOPs, regardless of the total parameter count.

Load balancing through architecture.

A persistent challenge in MoE models is load balancing: ensuring that tokens are distributed roughly equally across experts, preventing โ€œexpert collapseโ€ where a few experts handle most tokens while others sit idle. Standard approaches add auxiliary loss terms to encourage balanced routing. NAS offers an alternative: searching over architectures that are inherently balanced by design. For example, NAS might discover that using different expert capacities at different layers naturally distributes the load, or that certain gating functions produce more balanced routing without auxiliary losses.

Proposition 24 (MoE Routing Entropy and Expert Utilisation).

Let ๐’‘=(p1,โ€ฆ,pE) be the average routing distribution over experts for a given MoE layer with E experts and top-k routing. The expert utilisation ratio is U=H[๐’‘]logโกE=โˆ’โˆ‘i=1EpilogโกpilogโกEโˆˆ[0,1], where U=1 corresponds to perfect load balance (uniform routing) and Uโ†’0 indicates expert collapse. NAS-searched MoE configurations achieve Uโ‰ฅ0.85 without auxiliary load-balancing losses, compared to Uโ‰ˆ0.70 for hand-designed configurations with standard auxiliary losses.

Using Generative Models as NAS Tools

The previous two sections explored NAS for generative models. Now we reverse the perspective entirely and ask: can generative models themselves serve as powerful tools for NAS? The answer is yes, and the idea leads to some of the most creative approaches in the field.

The core observation is that NAS is fundamentally a generative problem: we need to produce high-quality architectures from a vast search space. Traditional NAS methods (RL, evolution, gradient-based) navigate this space through optimisation. But generative models are designed precisely to produce complex, structured outputs from learned distributions. Why not train a generative model to directly generate good architectures?

This section develops three approaches: diffusion models for architecture generation, LLMs as architecture designers, and evolutionary-generative hybrids.

Diffusion Models for Architecture Generation

We have already encountered DiffusionNAG (DiffusionNAG: Graph Diffusion for Architecture Generation), which uses graph diffusion to generate architectures for diffusion models. Here we develop the general theory of using diffusion models as NAS tools, applicable to any domain.

The architecture generation problem.

Given a dataset ๐’Ÿarch={(Gi,yi)}i=1N of architecture graphs and their performance scores, we wish to learn a conditional generative model pฯˆ(G|y) that, given a target performance y, generates architectures likely to achieve that performance. The training objective is to maximise the conditional log-likelihood: (GEN Objective)maxฯˆโก๐”ผ(G,y)โˆผ๐’Ÿarch[logโกpฯˆ(G|y)].

For graph-structured architectures, we model pฯˆ as a graph diffusion model with the forward and reverse processes defined in Definition 25. The conditional variant adds the performance score y as an additional input to the denoising network.

Theorem 8 (Architecture Diffusion Convergence).

Let pdata(G|y) denote the true conditional distribution of architectures achieving performance y, and let pฯˆ(T)(G|y) denote the distribution generated by a graph diffusion model with T denoising steps and denoising network fฯˆ. If the denoising network satisfies the regularity conditions:

  1. fฯˆ is Lf-Lipschitz in the graph metric dGED (graph edit distance),

  2. The noise schedules {ฮฒtA,ฮฒtX} satisfy โˆ‘t=1Tฮฒtโ†’โˆž as Tโ†’โˆž,

  3. The training loss converges: โ„’NAG(ฯˆ)โ‰คฯต,

then the total variation distance between the generated and true distributions is bounded: (Diffusion Convergence)dTV(pฯˆ(T)(โ‹…|y),pdata(โ‹…|y))โ‰ค2ฯต+O(Tโˆ’1/2).

Proof sketch.

The proof follows the standard convergence analysis of diffusion models, adapted to graph-structured data. The bound decomposes into two terms:

  1. Approximation error (2ฯต): the denoising network's imperfect prediction of the clean graph from the noisy one, measured by the training loss. By Pinsker's inequality, the KL divergence between the learned reverse kernel and the true reverse kernel at each step is bounded by ฯต/T, and the total variation after T steps accumulates to 2ฯต.

  2. Discretisation error (O(Tโˆ’1/2)): the error from discretising the continuous-time reverse SDE into T steps. For graph-structured data with discrete adjacency matrices, this term involves the mixing time of the discrete noise process, which converges at rate O(Tโˆ’1/2) under the noise schedule conditions.

Remark 14.

In practice, T=1000 denoising steps and a training loss of ฯตโ‰ˆ0.01 give a total variation bound of approximately 0.02+O(0.03)โ‰ˆ0.17. This means the generated architecture distribution is within 17% total variation of the true distribution, which is tight enough for practical NAS: even if 17% of generated architectures are suboptimal, the remaining 83% are drawn from a distribution concentrated on high-performing architectures.

LLMs as Architecture Designers

Large language models offer a fundamentally different approach to architecture generation: instead of learning a distribution over graphs, they generate architecture specifications as code. This leverages the LLM's pre-trained knowledge of programming patterns, neural network libraries, and architectural best practices.

The code generation approach.

The simplest approach prompts an LLM with a natural language description of the task and asks it to generate PyTorch or JAX code defining the architecture. The prompt typically includes:

  1. A description of the task (e.g., โ€œimage classification on CIFAR-10โ€).

  2. Constraints on the architecture (e.g., โ€œfewer than 5M parameters, inference latency under 10msโ€).

  3. Performance targets (e.g., โ€œachieve at least 95% test accuracyโ€).

  4. Optionally, examples of known good architectures.

Example 2 (LLM Architecture Prompt).

Consider the following prompt and (simplified) response:

Prompt: โ€œDesign a neural network for CIFAR-10 image classification. The network should have fewer than 2M parameters and achieve at least 94% test accuracy. Use modern best practices including residual connections and batch normalisation. Output PyTorch code.โ€

LLM Response:

class NASNet(nn.Module):
    def __init__(self):
        super().__init__()
        self.stem = nn.Conv2d(3, 64, 3, padding=1)
        self.blocks = nn.Sequential(
            ResBlock(64, 128, stride=2),
            ResBlock(128, 128),
            ResBlock(128, 256, stride=2),
            ResBlock(256, 256),
            ResBlock(256, 512, stride=2),
        )
        self.pool = nn.AdaptiveAvgPool2d(1)
        self.fc = nn.Linear(512, 10)

    def forward(self, x):
        x = self.stem(x)
        x = self.blocks(x)
        x = self.pool(x).flatten(1)
        return self.fc(x)
This architecture has approximately 1.8M parameters and follows standard practices. While not surprising, it demonstrates the LLM's ability to produce valid, runnable architecture code. More sophisticated prompting strategies (chain-of-thought, iterative refinement, architecture-aware fine-tuning) can produce more creative and higher-performing designs.

Chain-of-thought architecture design.

More sophisticated approaches use chain-of-thought (CoT) prompting, where the LLM is asked to reason about architectural choices before making them. The prompt asks the LLM to:

  1. Analyse the task requirements (input modality, output type, data characteristics).

  2. Consider relevant architectural principles (receptive field requirements, parameter efficiency, computational constraints).

  3. Propose and compare multiple candidate architectures.

  4. Select the best candidate and justify the choice.

  5. Output the final architecture code.

This approach produces architectures that are not only valid but explained, providing human-interpretable reasoning for each design decision.

LLM-based architecture evaluation.

An even more intriguing application is using LLMs to predict architecture performance without training. Given an architecture description, the LLM estimates its accuracy, latency, or other metrics based on its knowledge of similar architectures. While less accurate than actual training, this provides a near-instantaneous proxy that can be used to filter candidates before expensive evaluation.

Caution.

LLM-based architecture design inherits the hallucination problem of language models. An LLM may confidently generate architectures with structural errors (incompatible tensor dimensions, invalid operation sequences) or grossly inaccurate performance predictions. All LLM-generated architectures must be validated by constructing and at least partially training the network before deployment.

Evolutionary-Generative Hybrids

The most powerful approach may be to combine generative models with evolutionary search, creating a hybrid that leverages the strengths of both. Generative models provide informed initialisation: they propose architectures from a learned distribution of good designs. Evolutionary search provides refinement: it mutates and recombines architectures to explore regions of the search space that the generative model may have missed.

The hybrid framework.

The evolutionary-generative hybrid maintains a population of architectures that evolves over generations. At each generation:

  1. Generative proposal: a generative model (diffusion or LLM) produces Kgen new candidate architectures.

  2. Evolutionary mutation: Kmut candidates are created by mutating existing architectures in the population.

  3. Crossover: Kcross candidates are created by combining elements of two parent architectures.

  4. Evaluation: all candidates are evaluated (via training or proxy).

  5. Selection: the top-performing candidates are retained for the next generation.

  6. Model update: the generative model is fine-tuned on the current population, improving its proposals over generations.

Step 6 is crucial: it creates a feedback loop between the generative model and the evolutionary search. As the population improves, the generative model learns from better architectures and proposes increasingly good candidates.

Algorithm 8 (Evolutionary-Generative NAS).

  1. Input: Generative model pฯˆ; population size P; generations G; mutation rate ฮผ; crossover rate ฮณ
  2. Initialise population ๐’ซ0 by sampling P architectures from pฯˆ
  3. Evaluate all architectures in ๐’ซ0
  4. for g=1,โ€ฆ,G
  5. Generate: sample Kgen architectures from pฯˆ
  6. Mutate: create Kmut mutants from ๐’ซgโˆ’1 with rate ฮผ
  7. Crossover: create Kcross children from parent pairs with rate ฮณ
  8. Evaluate: evaluate all new candidates
  9. Select: retain top-P architectures as ๐’ซg
  10. Update model: fine-tune pฯˆ on ๐’ซg Improve generative prior
  11. return best architecture across all generations

Proposition 25 (Hybrid Search Efficiency).

Let ๐’œโˆ— be the globally optimal architecture. If the generative model pฯˆ assigns probability at least ฮด>0 to a neighbourhood of ๐’œโˆ— after model update at generation g, and the mutation operator can reach ๐’œโˆ— from any architecture in that neighbourhood within m mutations, then the expected number of generations to discover ๐’œโˆ— is bounded by ๐”ผ[gโˆ—]โ‰ค1ฮดโ‹…Kgenโ‹…11โˆ’(1โˆ’ฮผ)m+O(logโก(1/ฮด)).

Proof.

At each generation, the probability that at least one generated architecture falls in the ฮด-neighbourhood is 1โˆ’(1โˆ’ฮด)Kgenโ‰ฅ1โˆ’eโˆ’ฮดKgen. Given such an architecture, the probability that m successive mutations reach ๐’œโˆ— is at least (1โˆ’(1โˆ’ฮผ)m)mโ‰ฅ1โˆ’(1โˆ’ฮผ)m for a single mutation step. Combining these with a geometric distribution argument gives the stated bound. The logarithmic correction accounts for the improvement in ฮด as the generative model is updated on better populations.

MethodSearch CostArchitecture QualityDiversity
Diffusion-basedLowHighMedium
LLM-basedVery LowMediumHigh
EvolutionaryHighHighLow
Evo-Generative HybridMediumVery HighHigh
Comparison of generative NAS approaches. The evolutionary-generative hybrid achieves the best trade-off between search cost and architecture quality.
Strengths and limitations.

The evolutionary-generative hybrid inherits the strengths of both parent approaches. The generative model provides a warm start that dramatically reduces the number of generations needed to find good architectures, while evolutionary search provides the exploration pressure needed to escape local optima and discover architectures outside the generative model's training distribution.

The main limitation is computational overhead: maintaining both a generative model and an evolutionary population requires more memory and computation than either approach alone. However, this overhead is typically small compared to the cost of evaluating architectures, especially when proxy evaluation methods are used.

Self-Adapting Networks

The NAS methods we have studied so far share a common assumption: the architecture is searched once and then frozen for deployment. But what if the architecture could adapt continuously, changing its structure in response to the data it encounters? A self-adapting network adjusts not only its weights (as all neural networks do during training) but also its architecture-its depth, width, connectivity, and computational allocation-as a function of the input, the task, or the training stage.

This idea draws direct inspiration from the biological brain. As we explored in How Nature Builds Brains, the brain does not settle on a fixed wiring diagram. Synapses form and dissolve, dendrites grow and retract, and cortical maps reorganise in response to experience. The brain is a self-adapting network par excellence, and the computational advantages of this adaptivity are profound.

This section develops the mathematics of self-adapting networks along three axes: dynamic architectures that change with each input, progressive growing and shrinking during training, and architecture adaptation for continual learning.

Dynamic Networks: Architecture as a Function of Input

Consider a standard deep network f๐œฝ with L layers. For every input ๐’™, the network executes all L layers, regardless of whether ๐’™ is a trivially easy example (a clear photograph of a cat in perfect lighting) or a supremely difficult one (an ambiguous Rorschach-like pattern). This uniform computational allocation is wasteful. A dynamic network allocates computation adaptively, using more layers, wider channels, or more attention heads for difficult inputs and fewer for easy ones.

Definition 31 (Dynamic Architecture Function).

A dynamic architecture function is a mapping ฮฑ:๐’ณโกร—ฮฆโ†’๐’ฎ from the input space ๐’ณโก and architecture parameter space ฮฆ to the architecture search space ๐’ฎ. For each input ๐’™, the dynamic architecture ฮฑ(๐’™;๐“) specifies which computational blocks to execute, yielding the output (Dynamic Output)f๐œฝฮฑ(๐’™)=f๐œฝ,ฮฑ(๐’™;๐“)(๐’™), where ๐“ are learnable architecture parameters optimised jointly with the model weights ๐œฝ.

Early exit networks.

The simplest form of dynamic architecture is the early exit network, which attaches auxiliary classifiers to intermediate layers. If an intermediate classifier is sufficiently confident in its prediction, the network โ€œexitsโ€ early, skipping the remaining layers.

Formally, let ๐’‰โ„“=fโ„“(๐’‰โ„“โˆ’1) be the hidden representation at layer โ„“, and let gโ„“(๐’‰โ„“) be an auxiliary classifier attached to layer โ„“. The exit criterion at layer โ„“ is (Early EXIT)exitย atย layerย โ„“โŸบmaxcโก[gโ„“(๐’‰โ„“)]cโ‰ฅฯ„, where ฯ„โˆˆ(0,1) is a confidence threshold. The effective depth of the network is input-dependent: Lโˆ—(๐’™)=minโก{โ„“:maxcโก[gโ„“(๐’‰โ„“)]cโ‰ฅฯ„}.

Definition 32 (Early Exit Policy).

An early exit policy ฯ€exit is defined by the tuple (g1,โ€ฆ,gL,ฯ„) consisting of auxiliary classifiers and a confidence threshold. The expected computational cost under this policy is (EXIT COST)Cโ€พ(ฯ€exit)=๐”ผ๐’™[โˆ‘โ„“=1Lโˆ—(๐’™)cโ„“], where cโ„“ is the computational cost of layer โ„“.

Adaptive width.

Beyond adaptive depth, a network can adapt its width by activating different channels or attention heads depending on the input. Channel gating learns a binary mask ๐’Žโ„“(๐’™)โˆˆ{0,1}Cโ„“ that selects which channels to compute at each layer: (Channel GATE)๐’‰โ„“=๐’Žโ„“(๐’™)โŠ™fโ„“(๐’‰โ„“โˆ’1), where ๐’Žโ„“ is produced by a lightweight gating network.

Proposition 26 (Dynamic Architecture Pareto Dominance).

Let fstatic be a static network with depth L and uniform width C, and let fdynamic be a dynamic network with the same maximum depth and width but input-dependent depth and width selection. For any target accuracy aโˆˆ[aminโก,amaxโก], the minimum computational cost satisfies Cdynamicโˆ—(a)โ‰คCstaticโˆ—(a), with strict inequality whenever the data distribution contains inputs of varying difficulty. That is, the dynamic network Pareto-dominates the static one on the accuracy-compute frontier.

Proof.

The static network with depth L is a special case of the dynamic network where ฮฑ(๐’™;๐“)=(L,C) for all ๐’™. The dynamic network's optimisation over ๐“ can only improve upon this constant choice. The inequality is strict whenever there exist inputs that can be correctly classified with fewer than L layers, which holds whenever the data contains inputs of varying difficulty.

Progressive Growing and Shrinking

Another form of architectural self-adaptation occurs during training: the network starts small and grows larger as training progresses, or starts large and is progressively pruned. This approach was pioneered in the generative modelling domain by Karras et al. [63], who grew GANs progressively from 4ร—4 resolution to 1024ร—1024, and in the discriminative domain by Chen, Goodfellow, and Shlens [62], who developed function-preserving network transformations.

Net2Net transformations.

The key challenge in growing a network is preserving the knowledge already learned. If we simply add random layers or neurons, the network's function changes unpredictably, potentially destroying useful representations. The Net2Net framework solves this by defining function-preserving transformations: operations that increase the network's capacity without changing its input-output function.

Definition 33 (Function-Preserving Network Morphism).

A function-preserving network morphism is a mapping ฮ“:(f๐œฝ,๐’œ)โ†ฆ(f๐œฝโ€ฒ,๐’œโ€ฒ) from a network with architecture ๐’œ and parameters ๐œฝ to a larger network with architecture ๐’œโ€ฒ and parameters ๐œฝโ€ฒ such that (Morphism)f๐œฝโ€ฒ,๐’œโ€ฒ(๐’™)=f๐œฝ,๐’œ(๐’™)โˆ€๐’™โˆˆ๐’ณโก. The morphism ฮ“ is capacity-increasing if |๐’œโ€ฒ|>|๐’œ| (where |โ‹…| denotes the number of parameters) and non-degenerate if the enlarged network can represent functions that the original cannot.

Two fundamental Net2Net morphisms are defined:

Net2WiderNet.

This morphism adds neurons to a hidden layer. Consider a fully connected layer with weight matrix ๐–โˆˆโ„nร—mโก and bias ๐’ƒโˆˆโ„nโก, followed by the next layer's weight matrix ๐–โ€ฒโˆˆโ„pร—nโก. To add k neurons:

  1. Select k existing neurons {j1,โ€ฆ,jk} to replicate (uniformly at random or by importance).

  2. Create new columns in ๐– by copying: ๐–~:,n+i=๐–:,ji for i=1,โ€ฆ,k.

  3. Divide the outgoing weights: for each replicated neuron ji and its copy n+i, set ๐–~:,jiโ€ฒ=๐–~:,n+iโ€ฒ=12๐–:,jiโ€ฒ.

The output of the wider network is identical to the original because each replicated neuron pair produces the same activation as the original neuron, and their halved outgoing weights sum to the original outgoing weight.

Net2DeeperNet.

This morphism inserts a new layer initialised as the identity function. Between layers โ„“ and โ„“+1, insert a new layer with weight matrix ๐–new=๐ˆ (the identity matrix) and bias ๐’ƒnew=๐ŸŽ. If the activation function ฯƒ satisfies ฯƒ(๐ˆ๐’™+๐ŸŽ)=ฯƒ(๐’™)=๐’™ (which holds for ReLU when ๐’™โ‰ฅ0), the deeper network computes exactly the same function as the original.

Theorem 9 (Zero-Forgetting via Function-Preserving Expansion).

Let f๐œฝ,๐’œ be a neural network trained on tasks {T1,โ€ฆ,Tk} achieving losses {โ„’1โˆ—,โ€ฆ,โ„’kโˆ—}. Let ฮ“ be a function-preserving network morphism producing f๐œฝโ€ฒ,๐’œโ€ฒ. Then:

  1. Zero immediate forgetting: โ„’i(f๐œฝโ€ฒ,๐’œโ€ฒ)=โ„’iโˆ— for all i=1,โ€ฆ,k.

  2. Increased capacity: if ฮ“ is non-degenerate, there exists a new task Tk+1 and parameters ๐œฝโ€ฒโ€ฒ such that f๐œฝโ€ฒโ€ฒ,๐’œโ€ฒ achieves lower loss on Tk+1 than any parameter setting of the original architecture ๐’œ.

  3. Fine-tuning stability: under ฮท-bounded gradient descent on task Tk+1 starting from ๐œฝโ€ฒ, the loss on prior tasks Ti increases at most as ฮ”โ„’iโ‰คฮทโ‹…โ€–Jiโ€–โ‹…โ€–โˆ‡๐œฝโ€ฒโ„’k+1โ€–, where Ji is the Jacobian of the loss on task Ti with respect to the parameters affected by the gradient update.

Proof.

Part (1) follows directly from the function-preserving property: since f๐œฝโ€ฒ,๐’œโ€ฒ(๐’™)=f๐œฝ,๐’œ(๐’™) for all ๐’™, the loss on any task is unchanged.

Part (2) follows from the non-degeneracy condition: the enlarged architecture can represent strictly more functions than the original. By the universal approximation theorem, there exist functions in the enlarged representable set that are not in the original set. Choosing Tk+1 to require such a function establishes the claim.

Part (3) follows from a first-order Taylor expansion of โ„’i around ๐œฝโ€ฒ: โ„’i(๐œฝโ€ฒโˆ’ฮทโˆ‡โ„’k+1)โ‰ˆโ„’i(๐œฝโ€ฒ)โˆ’ฮทโˆ‡โ„’iโŠคโˆ‡โ„’k+1โ‰คโ„’iโˆ—+ฮทโ€–โˆ‡โ„’iโ€–โ€–โˆ‡โ„’k+1โ€–. The Jacobian bound โ€–Jiโ€– replaces โ€–โˆ‡โ„’iโ€– in the general multi-output case.

Key Idea.

Function-preserving morphisms provide a mathematically principled bridge between NAS and continual learning. When a new task arrives, the network can be expanded via Net2WiderNet or Net2DeeperNet without forgetting any previously learned tasks-a guarantee that no weight-regularisation method (such as EWC [44]) can match. The expanded capacity is then used to learn the new task through standard gradient descent.

Neural Architecture Adaptation for Continual Learning

The connection between self-adapting networks and continual learning (26) runs deep. The core challenge of continual learning-learning new tasks without forgetting old ones-can be addressed at three levels:

  1. Parameter level: constrain weight changes to protect important parameters (EWC [44], SI, MAS).

  2. Memory level: store and replay examples from previous tasks (experience replay, generative replay).

  3. Architecture level: expand or restructure the network to accommodate new tasks without disrupting existing computations.

The architecture-level approach is the most powerful but least explored. We survey three key methods.

PackNet: iterative pruning and freezing.

PackNet assigns each task a disjoint subset of the network's parameters. After training on task Tk, the parameters important for Tk are identified via magnitude pruning, and the remaining parameters are freed for future tasks. The freed parameters are then available for task Tk+1. This creates a partition of the network's parameters across tasks, guaranteeing zero forgetting (frozen parameters cannot change) at the cost of diminishing capacity for later tasks.

Progressive Neural Networks.

Progressive Neural Networks [82] take a different approach: for each new task, a new column (a complete network) is instantiated alongside the frozen columns from previous tasks. Lateral connections from the frozen columns to the new column allow knowledge transfer. The new column can leverage features learned by all previous columns without risk of forgetting, since the previous columns are completely frozen.

The computational cost of progressive networks grows linearly with the number of tasks, since each task adds a full column. The memory cost grows quadratically due to the lateral connections from all previous columns to the current one.

Dynamically Expandable Networks.

Dynamically Expandable Networks (DEN) combine selective retraining with architectural expansion. For each new task, DEN:

  1. Selectively retrains only the parameters relevant to the new task (identified via group sparsity).

  2. If selective retraining is insufficient, expands the network by adding new neurons with connections determined by a splitting criterion.

  3. Applies group Lasso regularisation to prevent unnecessary expansion.

MethodForgettingCapacityComputeKnowledge Transfer
EWCNon-zeroFixedLowImplicit
PackNetZeroDecreasingLowNone
Progressive NetsZeroIncreasingHighLateral
DENNear-zeroAdaptiveMediumSelective
Net2Net + NASZeroAdaptiveMediumFull
Comparison of architecture-level continual learning methods. Each method trades off between forgetting, capacity, and computational cost.

Proposition 27 (Capacity-Task Scaling).

For a network with initial capacity C0 parameters and a sequence of K tasks of approximately equal complexity, the minimum capacity CK required to achieve zero forgetting and target accuracy a on all tasks scales as: CK=ฮ˜(C0+Kโ‹…ctask), where ctask is the per-task capacity requirement. PackNet achieves this with ctaskโ†’0 (fixed capacity, but accuracy degrades). Progressive Networks achieve this with ctask=C0 (full column per task, maximum capacity growth). DEN and Net2Net + NAS achieve intermediate scalings where ctask adapts to the actual complexity of each task.

The Quest for Unified Architectures

One of the most remarkable developments in deep learning over the past decade is the convergence of architectures across modalities. The transformer, originally designed for machine translation [76], now dominates not only natural language processing but also computer vision [45], speech recognition, protein structure prediction, music generation, and robotics. This architectural convergence raises a profound question: is the transformer the โ€œfinal architecture,โ€ or is it merely the first step toward a truly universal computational substrate that NAS might help discover?

The Transformer as Universal Substrate

The transformer's conquest of multiple modalities began with the Vision Transformer (ViT) [45], which showed that a standard transformer applied to image patches could match or exceed convolutional networks on image classification. This result was initially surprising: the transformer lacks the inductive biases (translation equivariance, local connectivity) that were thought to be essential for visual processing. ViT's success demonstrated that these biases could be learned from data, provided the dataset was large enough.

Historical Note.

The transformer's expansion across modalities followed a remarkable pattern: in each new domain, researchers initially expected the transformer to fail due to its lack of domain-specific inductive biases, only to find that it matched or exceeded specialised architectures when given sufficient data and compute.

  • Vision (2020): ViT [45] matched CNNs on ImageNet.

  • Audio (2021): Audio Spectrogram Transformer matched CNN-based audio classifiers.

  • Protein structure (2021): AlphaFold2 used a transformer-based architecture to solve protein folding.

  • Diffusion models (2023): DiT [43] matched U-Net-based diffusion models.

  • Robotics (2023โ€“2024): RT-2 and related models applied transformers to robotic control.

In each case, the โ€œsecret ingredientโ€ was the same: tokenise the input into a sequence, apply self-attention, and scale up the data and compute.

The pattern is clear: the transformer succeeds across modalities because self-attention is a universal function approximator over sets (and, by extension, over sequences via positional encoding). Any structured data that can be decomposed into a set of tokens-whether words, image patches, audio frames, amino acid residues, or robotic joint states-can be processed by a transformer.

The tokenisation bottleneck.

The key step in applying a transformer to any modality is tokenisation: the conversion of raw input into a sequence of embeddings. This step encodes domain-specific structure (spatial locality for images, temporal ordering for audio, chemical properties for proteins) into a format that the modality-agnostic transformer can process.

The quality of the tokeniser determines the ceiling of the transformer's performance. A poor tokeniser that destroys important domain structure will produce a poor model regardless of the transformer's capacity. This makes tokeniser design a natural target for NAS: rather than hand-designing tokenisers, we can search for the optimal tokenisation strategy for each modality.

Modality-Adaptive Architectures

A modality-adaptive architecture consists of a shared backbone (typically a transformer) with modality-specific adapters that handle the tokenisation and detokenisation for each modality. NAS can be used to search for optimal adapter configurations.

Definition 34 (Modality-Adaptive Architecture).

A modality-adaptive architecture is a triple (โ„ฌ,{โ„ฐm}mโˆˆโ„ณ,{๐’Ÿm}mโˆˆโ„ณ) consisting of:

  1. A shared backbone โ„ฌ (typically a transformer) with parameters ๐œฝB.

  2. For each modality m in the modality set โ„ณ, an encoder adapter โ„ฐm with parameters ๐œฝmE that tokenises raw input ๐’™(m) into a sequence of embeddings ๐’›1(m),โ€ฆ,๐’›nm(m).

  3. For each modality m, a decoder adapter ๐’Ÿm with parameters ๐œฝmD that converts the backbone's output embeddings back into modality-specific outputs.

The total parameter count is |๐œฝB|+โˆ‘mโˆˆโ„ณ(|๐œฝmE|+|๐œฝmD|), where the backbone parameters are shared across all modalities.

The NAS problem for modality-adaptive architectures searches for the optimal adapter configurations while keeping the backbone fixed: (Modality NAS)(โ„ฐmโˆ—,๐’Ÿmโˆ—)=argโ€‰minโ„ฐm,๐’Ÿmโˆˆ๐’ฎmโกโ„’m(๐’Ÿmโˆ˜โ„ฌโˆ˜โ„ฐm)โˆ€mโˆˆโ„ณ.

This formulation decouples the expensive backbone training from the relatively cheap adapter search, making NAS practical even for foundation models with hundreds of billions of parameters.

Beyond Transformers: What NAS Might Discover

While the transformer has proven remarkably versatile, it is not without limitations. The quadratic computational cost of self-attention (O(n2d) for sequence length n and hidden dimension d) limits its applicability to very long sequences. State-space models such as Mamba [56] offer linear scaling with sequence length, trading attention's flexibility for computational efficiency.

Hybrid search spaces.

The most intriguing possibility is that NAS, given a sufficiently rich search space that includes both attention and state-space operations, might discover hybrid architectures that outperform both pure transformers and pure state-space models. The search space would include:

  • Transformer blocks (multi-head self-attention + FFN).

  • State-space blocks (selective state-space layers).

  • Convolutional blocks (1D or 2D convolutions).

  • Recurrent blocks (GRU or LSTM cells).

  • Novel combinations and connection patterns.

Conjecture 1 (Architecture Convergence).

As the scale of training data and computation increases, the set of Pareto-optimal architectures (on the accuracy-compute frontier) converges to a small family parameterised by a low-dimensional manifold. Formally, let ๐’œโˆ—(n,C) denote the set of Pareto-optimal architectures for dataset size n and compute budget C. Then limn,Cโ†’โˆžโกdimโก(hull(๐’œโˆ—(n,C)))=d0 for some universal constant d0 that depends only on the task type (classification, generation, etc.) and not on the specific dataset.

This conjecture, if true, would explain why the transformer has proven so dominant: at current scales, the Pareto-optimal family happens to be centred on transformer-like architectures. At much larger scales, NAS might discover that the optimal family shifts to a different region of architecture space, or remains concentrated on transformers but with specific hybrid modifications.

Insight.

There is a fundamental tension between architectural diversity and scaling laws. Scaling laws [46] suggest that performance improves predictably with model size, data, and compute for a fixed architecture family. If NAS discovers a fundamentally different architecture, existing scaling laws may not apply, and the investment in understanding transformer scaling would need to be repeated. This creates a strong economic incentive to keep searching within the transformer family, even if better architectures exist-a form of โ€œarchitectural lock-inโ€ analogous to technology lock-in in economics.

Sleep-Inspired Architecture Optimization

We return now to one of the most captivating threads woven through this chapter: the analogy between sleep and offline model optimisation. In How Nature Builds Brains we explored how the brain's architecture is sculpted by synaptic pruning and plasticity. Now we draw on a deeper biological insight: the brain does much of its architectural optimisation during sleep.

During sleep, the brain is far from idle. It replays and consolidates memories, prunes unnecessary synaptic connections, strengthens important ones, and performs a global downscaling of synaptic weights that restores the brain's capacity for new learning. What if artificial neural networks could do the same?

This section develops the NeuroDream framework for sleep-inspired architecture optimisation, explores offline restructuring techniques, and considers the provocative possibility of adaptive foundation models that optimise their own architectures during periods of low utilisation.

The NeuroDream Framework

The biological basis for sleep-inspired optimisation comes from two well-established neuroscience theories.

Synaptic homeostasis hypothesis.

Tononi and Cirelli's synaptic homeostasis hypothesis [71] proposes that waking experience causes a net increase in synaptic strength throughout the brain, and that sleep serves to globally downscale synaptic weights, restoring the brain's capacity for new learning. The key prediction is that sleep is not merely โ€œrestโ€ but an active computational process that optimises the brain's information processing efficiency.

Memory consolidation during sleep.

Walker's research [72] has demonstrated that sleep plays a critical role in memory consolidation. During non-rapid eye movement (NREM) sleep, the hippocampus replays recently encoded memories to the neocortex, gradually transferring knowledge from a fast-learning, capacity-limited system (hippocampus) to a slow-learning, high-capacity system (neocortex). This process resembles knowledge distillation in machine learning, where a smaller โ€œteacherโ€ model's knowledge is transferred to a larger โ€œstudentโ€ model.

Definition 35 (Architecture Consolidation).

Architecture consolidation is the process of modifying a neural network's architecture during an offline phase (the โ€œsleep phaseโ€) to improve its efficiency without degrading its performance. Formally, given a trained network f๐œฝ,๐’œ, architecture consolidation produces a network f๐œฝโ€ฒ,๐’œโ€ฒ such that:

  1. Performance preservation: โ„’(f๐œฝโ€ฒ,๐’œโ€ฒ)โ‰คโ„’(f๐œฝ,๐’œ)+ฯต for a small tolerance ฯตโ‰ฅ0.

  2. Efficiency improvement: C(๐’œโ€ฒ)<C(๐’œ), where C measures computational cost (FLOPs, latency, memory, or energy).

  3. Capacity restoration: the consolidated network has freed capacity C(๐’œ)โˆ’C(๐’œโ€ฒ) available for learning new tasks or improving existing ones.

The NeuroDream framework [73] implements architecture consolidation through alternating wake and sleep phases:

  • Wake phase. The network operates normally: it processes inputs, makes predictions, and updates its weights via standard gradient descent. The architecture is fixed during the wake phase.

  • Sleep phase. The network goes โ€œofflineโ€ (no new data is processed) and performs architecture optimisation: itemize

  • Synaptic downscaling: globally reduce the magnitude of weights, favouring sparse representations.

  • Neuron merging: identify and merge redundant neurons whose activations are highly correlated.

  • Layer pruning: remove layers whose residual contributions are below a threshold.

  • Memory replay: generate synthetic data from a stored generative model and use it to fine-tune the consolidated network, preventing catastrophic forgetting. itemize

Mathematical formulation.

The NeuroDream wake-sleep cycle can be formalised as an alternating optimisation over weights and architecture: (WAKE)Wake:๐œฝ(k+1)=argโ€‰min๐œฝโกโ„’train(f๐œฝ,๐’œ(k)),Sleep:๐’œ(k+1)=argโ€‰min๐’œโˆˆ๐’ฎโกC(๐’œ)s.t.โ„’val(f๐œฝ(k+1),๐’œ)โ‰คโ„’(k)+ฯต, where โ„’(k) is the validation loss after the k-th wake phase. The sleep phase solves a constrained optimisation problem: find the most efficient architecture that preserves performance within tolerance ฯต.

Proposition 28 (Consolidation Efficiency).

Let f๐œฝ,๐’œ be a network with P parameters and let r denote the fraction of redundant parameters (neurons whose removal changes the output by at most ฮด on average). Then architecture consolidation can reduce the parameter count to at most (1โˆ’r+rฮด/ฯต)โ‹…P while maintaining performance within tolerance ฯต. For typical overparameterised networks where rโ‰ˆ0.3โ€“0.5, this yields 25%โ€“45% compression.

Proof.

Each redundant neuron with output perturbation โ‰คฮด can be removed at a cost of at most ฮด to the overall loss (by triangle inequality over the network's layers). Removing all rP redundant neurons costs at most rPโ‹…ฮด/P=rฮด. To keep the total loss increase below ฯต, we remove at most ฯต/(rฮด)โ‹…rP=(ฯต/ฮด)โ‹…P neurons if ฯต/ฮดโ‰คr, or all redundant neurons if ฯต/ฮดโ‰ฅr. In the typical case where ฮดโ‰ชฯต, nearly all redundant neurons can be removed, giving a compressed parameter count of (1โˆ’r)P+O(rฮดP/ฯต).

Offline Architecture Restructuring

The sleep phase encompasses several specific restructuring operations that mirror the brain's offline processing.

Neuron merging.

Two neurons in the same layer whose activation patterns are highly correlated can be merged into a single neuron without significantly affecting the network's output. Let ๐’‰j and ๐’‰k be the activation vectors of neurons j and k over a calibration dataset. If corr(๐’‰j,๐’‰k)โ‰ฅ1โˆ’ฮด, the neurons can be merged by:

  1. Replacing both neurons with a single neuron whose incoming weights are the average of the original weights: ๐’˜merged=12(๐’˜j+๐’˜k).

  2. Summing the outgoing weights: ๐’˜out,merged=๐’˜out,j+๐’˜out,k.

Knowledge distillation as consolidation.

A powerful form of architecture consolidation trains a smaller โ€œstudentโ€ network to mimic the larger โ€œteacherโ€ network's outputs. The student architecture is found by NAS (searching over smaller architectures), and the distillation loss (Distillation)โ„’distill=ฮฑKL(softmax(fteacher(๐’™)/ฯ„)โ€–softmax(fstudent(๐’™)/ฯ„))+(1โˆ’ฮฑ)โ„’CE transfers the teacher's knowledge to the student. This is directly analogous to the hippocampal-to-neocortical transfer during NREM sleep: the โ€œhippocampusโ€ (teacher) replays its knowledge, and the โ€œneocortexโ€ (student) gradually absorbs it into a more efficient representation.

Layer collapse detection.

Some layers in deep networks learn near-identity transformations: fโ„“(๐’™)โ‰ˆ๐’™. These layers consume computation without contributing meaningful processing. Layer collapse detection identifies such layers by measuring the residual norm ratio: ฯโ„“=๐”ผ[โ€–fโ„“(๐’™โ„“)โˆ’๐’™โ„“โ€–]๐”ผ[โ€–๐’™โ„“โ€–]. If ฯโ„“<ฯ„collapse for a threshold ฯ„collapse (typically 0.01โ€“0.05), layer โ„“ is removed and its skip connection becomes a direct identity.

Adaptive Foundation Models

The most ambitious application of sleep-inspired optimisation is to deployed foundation models. Large language models and diffusion models serving production traffic have natural โ€œsleep opportunitiesโ€: periods of low utilisation (late night, weekends, off-peak hours) when computational resources are available but largely idle. What if the model used these idle periods to optimise its own architecture?

Algorithm 9 (NeuroDream-NAS for Adaptive Foundation Models).

  1. Input: Deployed model f๐œฝ,๐’œ; performance threshold โ„’maxโก; compression target Ctarget; wake-sleep cycle count K; calibration dataset ๐’Ÿcal
  2. for k=1,โ€ฆ,K
  3. - Wake Phase -
  4. Deploy model f๐œฝ(k),๐’œ(k)
  5. Collect usage statistics and hard examples
  6. Continue weight optimisation on incoming data (optional)
  7. - Sleep Phase (idle time) -
  8. Measure neuron correlations on ๐’Ÿcal
  9. Identify redundant neurons: {j:โˆƒkโ‰ j,corr(๐’‰j,๐’‰k)โ‰ฅ1โˆ’ฮด}
  10. Identify collapsible layers: {โ„“:ฯโ„“<ฯ„collapse}
  11. Merge redundant neurons, remove collapsible layers โ†’๐’œ(k+12)
  12. Distill: train f๐œฝโ€ฒ,๐’œ(k+12) to match f๐œฝ(k),๐’œ(k) on ๐’Ÿcal
  13. if โ„’(f๐œฝโ€ฒ,๐’œ(k+12))โ‰คโ„’maxโก
  14. Accept: ๐’œ(k+1)=๐’œ(k+12), ๐œฝ(k+1)=๐œฝโ€ฒ
  15. else
  16. Reject: ๐’œ(k+1)=๐’œ(k), ๐œฝ(k+1)=๐œฝ(k)
  17. return optimised model f๐œฝ(K),๐’œ(K)

Key Idea.

The vision of adaptive foundation models is this: a deployed LLM or diffusion model progressively optimises itself over its lifetime, becoming more efficient with each wake-sleep cycle. Over months of deployment, the model's architecture could be compressed by 30โ€“50% while maintaining or even improving its performance, as the sleep phase discovers and removes redundant computations that the original training never exposed. This creates a virtuous cycle: more efficient models cost less to serve, enabling deployment at larger scale, which generates more data for further optimisation.

Caution.

Self-modifying deployed systems pose significant safety challenges. If a foundation model optimises its own architecture during sleep phases:

  1. Alignment drift: architectural changes may subtly alter the model's behaviour in ways that are difficult to detect but violate alignment constraints.

  2. Capability jumps: architecture optimisation may inadvertently increase the model's capabilities in dangerous directions.

  3. Irreversibility: once parameters are pruned or neurons merged, the original model cannot be recovered without storing a complete checkpoint.

  4. Verification difficulty: proving that the consolidated model is โ€œequivalentโ€ to the original is computationally intractable in general.

Any deployment of sleep-inspired architecture optimisation must include comprehensive monitoring, automated testing, and rollback mechanisms. The performance threshold โ„’maxโก should include not only task metrics but also safety and alignment evaluations.

The Architecture-Memory Connection

We close this section by reflecting on the deep connection between architecture and memory, a connection that unifies the biological and computational perspectives developed throughout this chapter.

In the brain, sleep consolidates memories: it selectively strengthens important memories and discards unimportant ones, restructuring the neural substrate in the process. In artificial neural networks, architecture consolidation compresses knowledge: it identifies and removes redundant computations, transferring essential information into a more efficient representation. The parallel is not merely metaphorical-the mathematical operations are analogous.

Dreaming as generative replay.

Perhaps the most evocative analogy is between dreaming and generative replay. During REM sleep, the brain generates vivid, often bizarre sequences of imagery that combine elements of recent experience in novel ways. One prominent theory holds that dreaming serves as a form of data augmentation: by generating and processing synthetic experiences, the brain prevents catastrophic forgetting and improves generalisation to novel situations.

The computational analogue is generative replay: training a generative model (a VAE, GAN, or diffusion model) on the data seen so far, then using the generative model to produce synthetic training examples during the โ€œsleepโ€ consolidation phase. These synthetic examples, like dreams, are recombinations of past experience that help prevent forgetting and promote generalisation.

The wake-sleep cycle for architecture optimisation. During the wake phase, the network processes data and learns. During the sleep phase, the architecture is consolidated (redundancies removed, layers pruned) and generative replay (โ€œdreamingโ€) prevents forgetting. The cycle repeats, progressively improving efficiency.

Remark 15.

There is a duality between memory and architecture: what is stored in the weights (memory) can often be equivalently encoded in the structure (architecture), and vice versa. A network with many neurons and sparse weights โ€œstoresโ€ information in its architecture (which neurons are connected). A network with few neurons and dense weights stores the same information in its parameters. Sleep-inspired optimisation can be viewed as the process of converting between these dual representations, finding the encoding that is most efficient for the information the network has actually learned. This duality connects architecture search to information theory (The Information-Theoretic Brain) and suggests that the optimal architecture is one that matches the information structure of the task.

Connections and Synthesis

Throughout this chapter, we have traced a path from neuroscience to neural architecture search to generative models. We have seen how the brain's developmental processes inspire algorithms that grow and prune computational graphs, how reinforcement learning and evolutionary strategies explore vast search spaces, how differentiable relaxations make architecture optimization tractable, and how hardware constraints shape the architectures we can deploy. Now we step back and reveal the connections between architecture search and the other major themes of this book. The threads we have followed individually now weave together into a larger picture.

The central argument of this section is that architecture is not merely a design choice made once before training begins. Architecture is a first-class variable in the optimization of AI systems, and its interactions with continual learning, privacy, alignment, and agency create both opportunities and dangers that demand careful analysis.

We organize the discussion around five connections, each linking NAS to a different chapter of this book. For each connection, we identify the mathematical relationship, develop at least one formal result, and discuss the practical implications. The section concludes with a unified view that synthesizes all connections into a single framework and argues for the centrality of architecture in future AI systems.

NAS Meets Continual Learning

The continual learning problem, developed in depth in 26, asks how a model can learn new tasks without forgetting old ones. The standard solutions operate on weights: elastic weight consolidation (EWC) penalizes changes to important parameters, experience replay stores and replays old data, and progressive neural networks freeze old columns while adding new ones. All of these approaches take the architecture as fixed and manipulate only the weights within it.

Architecture adaptation offers a fundamentally different strategy. Instead of regularizing weights or replaying data, we change the architecture itself. When a new task arrives, the model grows new capacity (additional layers, wider hidden dimensions, new attention heads) dedicated to that task, while the existing capacity remains frozen. This strategy transforms the stability-plasticity tradeoff from a zero-sum game into a positive-sum one: stability is achieved by freezing, plasticity is achieved by growing.

Key Idea.

Fixed architectures force a tradeoff between stability and plasticity. Every gradient step that improves performance on a new task risks degrading performance on old tasks, because the same parameters serve both purposes. Adaptive architectures resolve this dilemma structurally: they add capacity for plasticity while freezing capacity for stability. The architecture itself encodes which knowledge is protected and which is subject to change. This is the architectural resolution of the stability-plasticity dilemma.

The synergy between NAS and continual learning runs in both directions. In the forward direction, NAS can discover architectures that are inherently amenable to continual learning: architectures with modular structure, where each module handles a distinct subtask and can be frozen independently. In the reverse direction, continual learning provides the sequential task setting that demands adaptive architectures. A model that must learn 100 tasks in sequence needs architecture adaptation far more urgently than a model trained on a single static dataset.

Let ๐’œt denote the architecture used for task t, and let ๐œฝt denote the weights after learning task t. The continual NAS objective is (Continual Objective)min๐’œ1,โ€ฆ,๐’œTโกโˆ‘t=1Tโ„’t(๐œฝtโˆ—(๐’œt))subjectย to๐’œtโˆ’1โІ๐’œtand๐œฝt|๐’œtโˆ’1=๐œฝtโˆ’1, where the containment constraint ๐’œtโˆ’1โІ๐’œt ensures that the architecture only grows (never shrinks), and the weight-freezing constraint ensures that the weights corresponding to old architecture components remain unchanged. Under these constraints, the forgetting on task tโ€ฒ<t is exactly zero: the function computed by the old subnetwork is preserved.

Remark 16.

Progressive neural networks [47] are a special case of the continual NAS framework in which the architecture growth is predetermined (add one column per task) rather than optimized. NAS generalizes this by searching over how much to grow, where to grow, and what operations to add. The search itself can be made continual: the architecture search policy learned for task t can be warm-started from the policy learned for task tโˆ’1.

The cost of this approach is that the architecture grows with each new task. If each task adds ฮ”p parameters, then after T tasks the model has p0+Tฮ”p parameters, where p0 is the initial parameter count. This linear growth is unsustainable for large T. Pruning offers a remedy: after growing for a new task, prune redundant connections within the new capacity. The combination of growing and pruning maintains a compact architecture while preserving zero-forgetting guarantees on the frozen subnetwork.

Definition 36 (Grow-Prune Continual Architecture).

A grow-prune continual architecture is a sequence {(๐’œt,โ„ณt)}t=1T where ๐’œt is the architecture after growing for task t and โ„ณtโІ๐’œt is a binary mask that prunes redundant connections. The effective architecture for task t is ๐’œtโŠ™โ„ณt, and the constraints become (๐’œtโˆ’1โŠ™โ„ณtโˆ’1)โІ(๐’œtโŠ™โ„ณt)and๐œฝt|๐’œtโˆ’1โŠ™โ„ณtโˆ’1=๐œฝtโˆ’1|๐’œtโˆ’1โŠ™โ„ณtโˆ’1. The effective parameter count is |๐’œtโŠ™โ„ณt|, which can remain bounded even as Tโ†’โˆž if the pruning rate exceeds the growth rate.

To make this concrete, consider a sequence of image generation tasks: first faces (CelebA), then bedrooms (LSUN), then natural scenes (ImageNet). A grow-prune continual NAS approach would proceed as follows. For the first task (faces), a standard NAS procedure finds an initial architecture ๐’œ1 (perhaps a U-Net with specific channel widths and skip connections optimized for face geometry). For the second task (bedrooms), the algorithm grows the architecture by adding channels to layers that show high gradient magnitude on bedroom images, yielding ๐’œ2โŠƒ๐’œ1. The original weights are frozen; only the new parameters are trained. After training, channels in the new capacity that contribute less than a threshold ฯ„ to the bedroom reconstruction loss are pruned, yielding a compact ๐’œ2โŠ™โ„ณ2. The process repeats for natural scenes, with the guarantee that face generation quality is preserved exactly (because the face subnetwork is frozen) and bedroom generation quality is preserved approximately (because pruning removed only low-contribution channels).

The formal analysis of grow-prune dynamics involves tracking two quantities across tasks: the cumulative parameter count Pt=|๐’œtโŠ™โ„ณt| and the cumulative forgetting Ft=โˆ‘tโ€ฒ=1tโˆ’1|โ„’tโ€ฒ(๐œฝt)โˆ’โ„’tโ€ฒ(๐œฝtโ€ฒ)|. Under the zero-initialization scheme (new output weights initialized to zero), the forgetting decomposes as (Forgetting Decomposition)Ft=โˆ‘tโ€ฒ=1tโˆ’1Ftโ€ฒprune, where Ftโ€ฒprune is the forgetting introduced by pruning at task tโ€ฒ. If pruning is conservative (only channels with contribution below ฯ„ are pruned), then Ftโ€ฒpruneโ‰คฯ„ for each task, giving Ftโ‰ค(tโˆ’1)ฯ„. This bound grows linearly with the number of tasks, but the per-task forgetting ฯ„ can be made arbitrarily small by choosing a smaller pruning threshold.

NAS Meets Privacy

The choice of architecture has a direct impact on a model's propensity to memorize training data. As we established in 29, the membership advantage of an attacker depends on the generalization gap of the model, which in turn depends on the model's effective capacity. A model with more parameters relative to its training set size has a larger generalization gap and is therefore more vulnerable to membership inference attacks.

This observation connects architecture search to privacy in a fundamental way: the architecture determines the effective capacity, which determines the memorization risk, which determines the privacy vulnerability. NAS can therefore be used not only to optimize accuracy and efficiency, but also to optimize privacy.

Proposition 29 (Architecture-Dependent Memorization).

Let ๐’œ be an architecture with effective parameter count |๐’œ|eff (accounting for parameter sharing, weight decay regularization, and dropout), and let f๐œฝ be a model with architecture ๐’œ trained on n i.i.d. samples from distribution P. Then the membership advantage of any adversary observing model outputs is bounded by (MIA Bound)AdvMIAโกโก(๐’œ)โ‰คO(|๐’œ|effn).

Proof.

The proof connects the generalization gap to membership advantage, following the framework of 29. Let โ„’train(๐œฝ) and โ„’test(๐œฝ) denote the training and test losses, respectively. The generalization gap is G(๐œฝ)=โ„’test(๐œฝ)โˆ’โ„’train(๐œฝ).

By the PAC-Bayes bound (or equivalently, by uniform convergence over the hypothesis class defined by ๐’œ), the generalization gap satisfies G(๐œฝ)โ‰คO(|๐’œ|efflogโกnn) with high probability. The connection between generalization gap and membership advantage was established in 29: if a model generalizes perfectly (G=0), then training and test points are indistinguishable, and no membership inference attack can succeed. More precisely, the membership advantage is bounded by AdvMIAโกโกโ‰ค2G(๐œฝ)โ‹…sup๐’™โก1โ„’(๐’™;๐œฝ), where the supremum accounts for the sensitivity of the loss to individual data points. For bounded loss functions (which is the case for cross-entropy with label smoothing, or for any loss clipped to [0,B]), the supremum is O(1), and we obtain AdvMIAโกโก(๐’œ)โ‰คO(|๐’œ|efflogโกnn)โ‰คO(|๐’œ|effn) where the last inequality holds for |๐’œ|effโ‰คn/logโกn, which is the regime of practical interest (models with more effective parameters than training samples have trivially high memorization).

The effective parameter count |๐’œ|eff accounts for capacity-reducing mechanisms:

  • Parameter sharing: if k parameters share the same value, they contribute only 1 to |๐’œ|eff.

  • Weight decay: L2 regularization with coefficient ฮป reduces the effective degrees of freedom by a factor that depends on ฮป and the spectrum of the Hessian.

  • Dropout: with dropout rate p, the effective capacity is reduced by approximately a factor of (1โˆ’p)2.

This completes the proof.

This proposition motivates privacy-aware NAS, where the search objective includes a privacy constraint. The multi-objective formulation is (Privacy NAS)min๐’œโˆˆ๐’ฎโกโ„’val(๐’œ)subjectย toAdvMIAโกโก(๐’œ)โ‰คฯตprivacy, where ฯตprivacy is a user-specified privacy budget. By Proposition 29, this constraint translates to an upper bound on the effective capacity: |๐’œ|effโ‰คฯตprivacyโ‹…n. The NAS algorithm must therefore search for architectures that achieve high validation accuracy while keeping the effective parameter count below a threshold determined by the training set size and the desired privacy level.

Insight.

NAS can be used as a privacy tool. By searching for architectures with small effective capacity relative to training set size, we can design models that are inherently more private. The architecture itself becomes a defense against membership inference. Unlike post-hoc defenses such as confidence masking or differential privacy noise injection, architectural privacy is โ€œfreeโ€ in the sense that it does not degrade model utility: the NAS algorithm finds the best architecture within the privacy-constrained region of the search space, rather than degrading a privacy-unaware architecture after the fact.

The practical implementation of privacy-aware NAS requires estimating the effective parameter count |๐’œ|eff for each candidate architecture during the search. For architectures without parameter sharing or regularization, |๐’œ|eff equals the raw parameter count, which is easy to compute. For architectures with weight sharing (as in convolutional layers), |๐’œ|eff is smaller than the raw count by a factor that depends on the sharing pattern. For architectures trained with weight decay ฮป, the effective degrees of freedom can be estimated using the hat matrix trace: |๐’œ|eff=trโก(๐‡(๐‡+ฮป๐ˆ)โˆ’1), where ๐‡ is the Hessian of the training loss. This quantity depends on the trained weights and therefore on the training data, creating a chicken-and-egg problem: we need to train the model to estimate |๐’œ|eff, but we want to use |๐’œ|eff to guide the search before training. Approximate methods, such as estimating |๐’œ|eff from a few training steps or using the architecture's topology to bound the effective degrees of freedom, are active research directions.

An alternative formulation replaces the hard constraint with a Lagrangian penalty: (Privacy Lagrangian)min๐’œโˆˆ๐’ฎโกโ„’val(๐’œ)+ฮปprivโ‹…|๐’œ|effn, where ฮปprivโ‰ฅ0 controls the accuracy-privacy tradeoff. When ฮปpriv=0, we recover standard NAS; as ฮปprivโ†’โˆž, the search converges to the smallest architecture in ๐’ฎ. The Pareto frontier of this bi-objective problem characterizes the fundamental tradeoff between model utility and privacy for a given search space.

NAS Meets Alignment

The alignment problem, as discussed in 25, concerns making AI systems behave in accordance with human intentions. Most alignment techniques, including reinforcement learning from human feedback (RLHF), direct preference optimization (DPO), and constitutional AI, operate on the model's weights within a fixed architecture. But the architecture itself constrains what behaviors are possible, and this constraint has implications for alignment that are only beginning to be explored.

Consider a transformer with L layers and H attention heads per layer. The architecture defines a family of functions โ„ฑ๐’œ={f๐œฝ:๐œฝโˆˆโ„dโก} parameterized by the weights ๐œฝ. Alignment through RLHF searches within โ„ฑ๐’œ for a weight vector ๐œฝโˆ— that maximizes a reward model's score. But if the desired behavior lies outside โ„ฑ๐’œ, no amount of weight optimization will achieve alignment. The architecture places a hard ceiling on alignment quality.

Remark 17.

RLHF optimizes weights within a fixed architecture. But the architecture itself constrains what behaviors are possible. An architecture that makes harmful behaviors computationally difficult (for example, by lacking the representational capacity for certain patterns) provides architectural safety. This is a stronger guarantee than behavioral safety through weight optimization, because it holds for all possible weight vectors, not just the one found by RLHF. Put differently, if the architecture cannot represent a harmful function, then no adversarial prompt or fine-tuning attack can elicit harmful behavior.

NAS for interpretable architectures constrains the search space to architectures with components that humans can understand and audit. Concretely, this means:

  • Modular architectures: the search space is restricted to architectures composed of modules with clear functional assignments (one module for factual retrieval, another for reasoning, another for safety filtering). Each module can be independently tested and verified.

  • Attention transparency: prefer architectures where attention patterns are sparse and semantically meaningful, rather than dense and opaque. Sparse attention is both more interpretable and more computationally efficient.

  • Separation of concerns: search for architectures that physically separate โ€œknowledgeโ€ from โ€œbehaviorโ€ through modular design. A model where factual knowledge resides in the feedforward layers and behavioral policies reside in the attention layers allows updating one without affecting the other.

Definition 37 (Architecturally Constrained Safety).

An architecture ๐’œ is (S,ฯต)-architecturally safe with respect to a set of unsafe behaviors S if for all weight vectors ๐œฝโˆˆโ„dโก, supsโˆˆSโกP(f๐œฝ(๐’™)ย exhibitsย behaviorย s)โ‰คฯต, where the probability is over inputs ๐’™ drawn from the deployment distribution. Equivalently, the architecture's function class โ„ฑ๐’œ has negligible intersection with the set of functions that produce unsafe behaviors.

This is an ambitious definition that may be unachievable for sufficiently expressive architectures (a universal function approximator can approximate any function, including unsafe ones). However, for restricted architectures (finite-width networks with bounded depth, specific activation functions, constrained connectivity), architectural safety may be provable. The NAS objective becomes: (Safety NAS)max๐’œโˆˆ๐’ฎโกCapability(๐’œ)subjectย to๐’œย isย (S,ฯต)-architecturallyย safe. This formulation searches for the most capable architecture that provably cannot produce unsafe behaviors.

The interplay between capability and safety creates a fundamental tension. A very restricted architecture (say, a linear model) is trivially safe with respect to most unsafe behaviors, but it is also incapable of performing useful tasks. A very expressive architecture (a deep transformer with billions of parameters) can perform remarkable tasks, but it can also represent unsafe functions. The optimal point on the capability-safety Pareto frontier depends on the task requirements and the acceptable risk level.

Research 1.

Research Direction: NAS for Mechanistic Interpretability. Mechanistic interpretability seeks to understand neural networks by identifying the specific circuits (subnetworks) responsible for specific behaviors. NAS can support this goal by searching for architectures where circuits are naturally modular and separable. Specifically, define an โ€œinterpretability scoreโ€ โ„(๐’œ) that measures how easily the architecture's behavior can be decomposed into independent circuits: โ„(๐’œ)=1|โ„ฌ|โˆ‘bโˆˆโ„ฌmax๐’žโІ๐’œโกbehavior(b,๐’ž)behavior(b,๐’œ)โ‹…|๐’œ||๐’ž|, where โ„ฌ is a set of target behaviors, ๐’ž is a subcircuit, and the ratio measures how much of behavior b is captured by subcircuit ๐’ž relative to its size. High โ„(๐’œ) indicates that each behavior is localized in a small subcircuit. Searching for architectures with high โ„(๐’œ) would produce models that are inherently more interpretable.

NAS Meets Agentic AI

Agentic AI systems (27) are autonomous systems that perceive their environment, make plans, use tools, and take actions to achieve goals. When an agentic system is equipped with NAS capability, it gains the ability to modify its own architecture. This creates a self-modifying agent that can:

  1. Identify performance bottlenecks in its own architecture through internal monitoring (which layers have high activation variance, which attention heads contribute least to performance, where information bottlenecks restrict capacity).

  2. Propose architectural modifications based on the diagnosed bottlenecks (add attention heads where capacity is lacking, prune layers that contribute minimally, change activation functions in regions with saturation).

  3. Evaluate proposed modifications in simulation before deployment, using a validation set or a model of the deployment environment.

  4. Deploy the improved architecture, transferring learned knowledge from the old architecture to the new one through knowledge distillation or direct weight transfer.

This capability blurs the line between the model and its training process. In standard machine learning, the training pipeline is designed by humans and the model is the output of that pipeline. In self-modifying agentic AI, the model is part of the training pipeline: it participates in its own design.

The mathematical framework for self-modifying agents extends the bilevel optimization of standard NAS. Let ฯ€๐’œ denote the agent's policy parameterized by architecture ๐’œ and weights ๐œฝ. The self-modification objective is (SELF Modify)maxฯ€modโก๐”ผฯ„โˆผฯ€๐’œ[โˆ‘t=0Tฮณtrt]where๐’œt+1=ฯ€mod(๐’œt,ht), where ฯ€mod is the architecture-modification policy, ht is the agent's observation history, rt is the reward at time t, and ฮณ is the discount factor. The modification policy ฯ€mod maps the current architecture and history to a new architecture. This is a meta-learning problem: the agent learns a policy (ฯ€mod) that generates good architectures conditioned on experience.

Caution.

Self-modifying architectures raise fundamental safety questions. An AI system that can redesign its own architecture could potentially remove safety constraints embedded in its structure. If an alignment module is implemented as a specific subnetwork (for example, a safety filter between the reasoning module and the output module), a self-modifying agent could learn to prune or bypass it if doing so improves its reward signal. This creates an adversarial dynamic where the alignment mechanism and the self-modification mechanism are in tension. Any deployment of self-modifying agents must include formal guarantees that the modification process preserves designated safety-critical components of the architecture. This is an open alignment problem that requires careful theoretical treatment.

One approach to safe self-modification is to partition the architecture into a modifiable region ๐’œmod and a frozen region ๐’œfrozen, with the constraint that the modification policy ฯ€mod can only alter ๐’œmod. The frozen region contains safety-critical components (alignment modules, output filters, value heads), while the modifiable region contains performance-related components (feature extractors, reasoning modules, memory banks). The safety guarantee is then: if the frozen region enforces safety property ฯ• for all possible outputs of the modifiable region, then the self-modified architecture satisfies ฯ• regardless of what modifications are made. This is a compositional safety guarantee that separates the verification burden (proving that the frozen region enforces ฯ•) from the modification freedom (the agent can freely modify the non-safety-critical components).

Proposition 30 (Compositional Safety Under Self-Modification).

Let ๐’œ=๐’œfrozenโˆช๐’œmod be a partitioned architecture, and let ฯ• be a safety property defined on the model's outputs. Suppose the frozen region implements a safety filter g:๐’ดmodโ†’๐’ดsafe such that for all inputs ๐’šโˆˆ๐’ดmod to the filter, the output g(๐’š) satisfies ฯ•. Then for any modification ๐’œmodโ†’๐’œmodโ€ฒ, the modified architecture ๐’œโ€ฒ=๐’œfrozenโˆช๐’œmodโ€ฒ also satisfies ฯ•.

Proof.

By the partition assumption, the output of the full architecture is f๐’œ(๐’™)=g(h๐’œmod(๐’™)), where h๐’œmod is the function computed by the modifiable region. After modification, the output becomes f๐’œโ€ฒ(๐’™)=g(h๐’œmodโ€ฒ(๐’™)). Since g satisfies ฯ• for all inputs (by assumption), and h๐’œmodโ€ฒ(๐’™) is a valid input to g (it lies in ๐’ดmod), the output f๐’œโ€ฒ(๐’™) satisfies ฯ•. The safety guarantee holds regardless of what function h๐’œmodโ€ฒ computes, because the safety filter g in the frozen region acts as a universal post-processor.

The limitation of this approach is that the safety filter g must be sufficiently expressive to enforce ฯ• for all possible inputs, and sufficiently robust that it cannot be โ€œconfusedโ€ by adversarial outputs from the modifiable region. If the modifiable region produces outputs in a distribution very different from what g was designed to handle, the safety guarantee may hold formally but fail in practice (the filter may produce safe but useless outputs). Designing safety filters that are both robust and utility-preserving is an open problem.

The connection between NAS and agentic AI extends beyond self-modification to include meta-learning. A meta-learning agent learns not just how to solve tasks, but how to learn to solve tasks. When combined with NAS, this becomes learning how to search for architectures: the agent develops a policy ฯ€search that, given a new task description, produces a distribution over architectures likely to perform well on that task. Formally, the meta-NAS objective is (META NAS)maxฯ€searchโก๐”ผ๐’ฏโˆผp(๐’ฏ)[max๐œฝโก๐”ผ(๐’™,๐’š)โˆผ๐’ฏ[logโกp(๐’š|๐’™;๐œฝ,๐’œโˆผฯ€search(๐’ฏ))]], where the outer expectation is over tasks ๐’ฏ drawn from a task distribution p(๐’ฏ), and the architecture ๐’œ is sampled from the search policy conditioned on the task. This meta-learning formulation amortizes the cost of NAS across tasks: after training ฯ€search on many tasks, the agent can produce good architectures for new tasks with a single forward pass, without running a full NAS procedure.

Insight.

Meta-NAS inverts the traditional NAS workflow. Instead of running a costly search procedure for each new task, the agent learns to predict good architectures directly from task descriptions. This is analogous to how a human expert, after designing architectures for many tasks, develops intuitions that allow quick architecture selection for new tasks. Meta-NAS formalizes and automates this expertise accumulation.

A Unified View

The connections we have drawn in the preceding subsections are not isolated observations. They are facets of a single insight: architecture is the medium through which all other aspects of a machine learning system interact. The architecture determines the capacity (affecting privacy), the modularity (affecting alignment and continual learning), the computational cost (affecting deployment), and the adaptability (affecting agency). Changing the architecture changes everything.

fig:nas:unified presents a schematic view of these connections. The central position of NAS is not an accident of emphasis; it reflects the mathematical reality that architecture is a universal variable that appears in every optimization problem we have studied. Diffusion models optimize the architecture of the denoiser network. GANs optimize the architectures of the generator and discriminator. VAEs optimize the architectures of the encoder and decoder. LLMs optimize the transformer architecture (depth, width, attention pattern). Continual learning optimizes the architecture's growth trajectory. Privacy optimization constrains the architecture's effective capacity. Alignment constrains the architecture's representational power. Agentic AI allows the architecture to modify itself. Information theory provides fundamental bounds on what any architecture can achieve. And neuroscience provides the biological templates that inspire architectural design.

Key Idea.

Future AI systems will not have fixed architectures designed by human engineers. Architecture will be a first-class citizen alongside weights, data, and objectives in the optimization of AI systems. The design of an AI system will be the design of a process that discovers architectures, not the design of an architecture itself. The architect's role shifts from drawing blueprints to designing the search space and the search algorithm.

This shift has already begun. The Transformer architecture, which dominates modern AI, was designed by human engineers in 2017 [76]. But variants of the Transformer (such as the Mixture-of-Experts transformer, the state-space model, and various efficient attention mechanisms) are increasingly being discovered or refined through automated search [83][43]. The next generation of foundational architectures may be entirely machine-designed, with humans specifying only the search space and the evaluation criteria.

To make the unified view concrete, consider a single use case: building a privacy-preserving, continually-learning image generator for a hospital that must generate synthetic medical images for research while protecting patient privacy and adapting to new imaging modalities over time. The architecture must satisfy:

  • Generation quality: low FID on medical images.

  • Privacy: (ฮต,ฮด)-differential privacy with ฮตโ‰ค1 to protect patient data.

  • Continual learning: ability to add new imaging modalities (X-ray, MRI, CT, ultrasound) without forgetting previously learned modalities.

  • Interpretability: clinicians must be able to verify that generated images are medically plausible.

  • Efficiency: the model must run on hospital hardware (a single GPU) with latency under 1 second per image.

No single existing architecture simultaneously satisfies all five requirements. A convolutional U-Net may produce good images but lacks modularity for continual learning. A modular architecture with separate generators per modality supports continual learning but wastes parameters. A small architecture satisfies the privacy and efficiency constraints but may produce poor images.

NAS, in its multi-objective formulation, is precisely the tool needed to navigate this five-dimensional tradeoff space. The search objective is (Hospital)min๐’œโˆˆ๐’ฎโก(FID(๐’œ),ฮต(๐’œ),FT(๐’œ),โˆ’โ„(๐’œ),latency(๐’œ)), where FT(๐’œ) is the forgetting after T modality additions and โ„(๐’œ) is the interpretability score (negated because we want to maximize it). The Pareto frontier of this five-objective problem characterizes the fundamental tradeoffs, and the NAS algorithm finds architectures on this frontier that best match the hospital's priorities.

This example illustrates the central thesis of the unified view: architecture is the meeting point of all the constraints and objectives that matter in real-world AI deployment. Optimizing the architecture is not a narrow engineering task; it is the task that integrates all other tasks. A NAS algorithm that can navigate the multi-objective landscape defined by quality, privacy, continual learning, interpretability, and efficiency is, in effect, solving the entire AI system design problem.

The table below summarizes the key connections and their mathematical manifestations.

TopicConnection to NASMathematical Form
Continual LearningProgressive architecture growth๐’œtโˆ’1โІ๐’œt
[4pt] PrivacyCapacity controls memorizationAdvMIAโกโกโ‰คO(|๐’œ|eff/n)
[4pt] AlignmentArchitecture constrains behaviorsโ„ฑ๐’œโˆฉSunsafe=โˆ…
[4pt] Agentic AISelf-modifying architecture๐’œt+1=ฯ€mod(๐’œt,ht)
[4pt] Diffusion ModelsDenoiser architecture designmin๐’œโก๐”ผโ€–๐โˆ’๐๐œฝโˆ—(๐’œ)(๐’™t,t)โ€–2
[4pt] GANsGenerator/discriminator designmin๐’œGโกmax๐’œDโกV(G๐’œG,D๐’œD)
[4pt] Information TheoryChannel capacity bounds๐–จโก(X;T)โ‰คC(๐’œ)
[4pt] NeuroscienceBiological architecture templatesSynaptic pruning โ†’ NAS pruning

Open Problems and Future Directions

We close the technical development of this chapter with the questions that remain unanswered, the problems that represent the frontier of architecture search research. These are invitations to the reader. Each open problem is a research direction that could fill a doctoral dissertation; some could define entire research careers. We organize them into theoretical foundations, practical challenges, and long-term visions. For each problem, we state what is known, what is not known, and why the gap matters. The reader who solves any of these open problems will have made a significant contribution to the field.

Theoretical Foundations

Despite the empirical success of NAS, the theoretical foundations remain surprisingly thin. We can build systems that discover excellent architectures, but we cannot yet explain why they work, when they will fail, or how close they come to optimality. The following open problems highlight the most pressing theoretical gaps.

Research 2.

Open Problem 1: Sample Complexity of NAS. What is the sample complexity of neural architecture search? How many architecture evaluations are sufficient to identify an ฯต-optimal architecture with probability at least 1โˆ’ฮด?

Let ๐’ฎ be a search space with |๐’ฎ| architectures, and let โ„’(๐’œ) denote the true validation loss of architecture ๐’œ. A naive union bound gives a sample complexity of O(|๐’ฎ|logโก(1/ฮด)/ฯต2), which is exponential in the description length of the search space (since |๐’ฎ| is typically exponential in the number of nodes and operations). Can we do better for structured search spaces?

Specifically, if the search space has a cell-based structure where the total number of architectures is |๐’ฎ|=KN(Nโˆ’1)/2 (for N nodes and K operations), but the architecture-performance landscape has bounded โ€œroughnessโ€ (bounded total variation, Lipschitz continuity in some architecture metric, or low effective dimension), can we prove a sample complexity that is polynomial in N and K?

The current state of the art provides no non-trivial bounds. The difficulty lies in the lack of a natural metric on the architecture space: architectures that are similar in description (differing by one operation) can have vastly different performance, making Lipschitz-type arguments difficult.

Research 3.

Open Problem 2: Global Convergence of NAS. Can we prove that NAS converges to globally optimal architectures under reasonable assumptions? Current convergence guarantees for differentiable NAS (DARTS and its variants) establish convergence to stationary points of the continuous relaxation, but these stationary points may correspond to suboptimal architectures after discretization.

Let ๐œถโˆ— be a stationary point of the DARTS objective โ„’val(๐œฝโˆ—(๐œถ),๐œถ) and let ๐’œโˆ—=discretize(๐œถโˆ—) be the architecture obtained by selecting the highest-weight operation at each edge. The open question is: under what conditions on the search space and the loss landscape does ๐’œโˆ— coincide with (or approximate) the global optimum ๐’œopt=argโ€‰min๐’œโˆˆ๐’ฎโกโ„’val(๐œฝโˆ—(๐’œ),๐’œ)?

Partial results exist for convex loss landscapes and search spaces with โ€œno bad local minimaโ€ properties, but the general case remains open.

Research 4.

Open Problem 3: Architecture Complexity and Generalization in Generative Models. What is the relationship between architecture complexity and generalization in generative models? For discriminative models, PAC-Bayes bounds and Rademacher complexity relate model complexity to generalization error. For generative models, the relationship is less clear and in some ways paradoxical.

Empirically, larger generative models (more parameters, more layers, more attention heads) consistently produce better samples as measured by FID, IS, and human evaluation, without obvious signs of overfitting. This contradicts the classical intuition that more parameters lead to more overfitting. The explanation may involve the implicit regularization of the training algorithm (SGD, Adam), the high-dimensional geometry of the data distribution, or the properties of the loss function (denoising score matching, adversarial loss, ELBO).

A complete theory would provide bounds of the form FID(๐’œ,n)โ‰คf(|๐’œ|,n,d,ฯƒ2), where |๐’œ| is the architecture complexity, n is the training set size, d is the data dimensionality, and ฯƒ2 characterizes the data distribution's complexity. No such bounds currently exist.

Conjecture 2 (No Free Lunch for Architectures).

No single architecture is optimal across all generative tasks. More formally, for any finite search space ๐’ฎ with |๐’ฎ|โ‰ฅ2 and any architecture ๐’œโˆˆ๐’ฎ, there exists a data distribution P such that ๐’œ is suboptimal by at least ฯต>0 compared to the best architecture in ๐’ฎ for P: (NFL)โˆ€๐’œโˆˆ๐’ฎ,โˆƒPย suchย thatย โ„’(๐’œ,P)โˆ’min๐’œโ€ฒโˆˆ๐’ฎโกโ„’(๐’œโ€ฒ,P)โ‰ฅฯต. This implies that architecture-task co-optimization is necessary for optimal performance: no single โ€œuniversal architectureโ€ can dominate all others across all tasks.

Argument supporting the conjecture.

The argument follows the structure of the classical No Free Lunch theorem for optimization [48]. Consider two architectures ๐’œ1 and ๐’œ2 with different inductive biases. For concreteness, let ๐’œ1 be a convolutional architecture (with translation equivariance) and ๐’œ2 be a fully connected architecture (without translation equivariance). For data distributions with strong translational structure (natural images), ๐’œ1 dominates. For data distributions without translational structure (tabular data, graph-structured data), ๐’œ2 may dominate.

More generally, each architecture encodes an inductive bias through its connectivity pattern, parameter sharing scheme, and operation types. The inductive bias helps on distributions that match it and hurts on distributions that do not. Since no single inductive bias can match all possible data distributions, no single architecture can be universally optimal.

The gap ฯต depends on the diversity of architectures in ๐’ฎ: if ๐’ฎ contains architectures with very different inductive biases, then ฯต can be large. A formal proof would require a precise characterization of โ€œinductive biasโ€ and its relationship to data distribution structure, which is itself an open problem.

Research 5.

Open Problem 4: Structure of the Architecture-Performance Landscape. What is the geometric structure of the function ๐’œโ†ฆโ„’(๐’œ) that maps architectures to their optimal validation loss? Is this landscape smooth (in some appropriate metric on architectures)? Does it have few local minima? Is it convex in any useful sense?

Empirical studies on NAS-Bench-101 and NAS-Bench-201 suggest that the landscape is relatively smooth: architectures that are โ€œcloseโ€ (in edit distance) tend to have similar performance. But these benchmarks cover tiny search spaces (โˆผ104 to โˆผ106 architectures), and it is unclear whether their properties extend to the search spaces of practical interest (>1015 architectures).

Understanding the landscape geometry would enable the design of search algorithms with provable convergence guarantees and would clarify why simple methods (random search, local search) often perform surprisingly well.

Research 6.

Open Problem 5: NAS Scaling Laws. Scaling laws for neural networks [46] relate model performance to the number of parameters N, the dataset size D, and the compute budget C, showing power-law relationships of the form L(N)โˆNโˆ’ฮฑ. These laws are derived for fixed architectures (typically transformers). The open question is: how do scaling laws change when the architecture is also optimized?

Let Lโˆ—(N,D) denote the loss achieved by the best architecture with N parameters trained on D data points. Is Lโˆ—(N,D) still a power law in N and D? If so, are the exponents ฮฑโˆ— and ฮฒโˆ— different from the fixed-architecture exponents?

We conjecture that ฮฑโˆ—>ฮฑ: optimizing the architecture leads to a steeper scaling curve, meaning that architecture-optimized models improve faster with scale than fixed-architecture models. The intuition is that as N grows, the โ€œwasted capacityโ€ in a suboptimal architecture grows proportionally, so architecture optimization yields larger absolute gains at larger scales. This conjecture, if true, would have significant practical implications: it would mean that NAS becomes more valuable, not less, as models grow larger.

The difficulty in testing this conjecture is computational. Running NAS at the scale of modern LLMs (billions of parameters, trillions of training tokens) is currently infeasible. Extrapolation from smaller scales is unreliable because the architecture-performance relationship may change qualitatively at larger scales (for example, certain operations like skip connections may become essential only at large depth).

Research 7.

Open Problem 6: Architecture-Dependent Expressiveness. Two architectures with the same number of parameters can have vastly different expressiveness (the set of functions they can represent). For example, a deep narrow network and a shallow wide network with the same parameter count can approximate different function classes with different efficiency.

The open problem is to develop a practical, computable measure of architecture expressiveness that goes beyond parameter counting. Candidates include:

  • Trajectory length: โ„ฐ(๐’œ)=๐”ผ๐’™[โ€–โˆ‡๐’™f๐œฝ(๐’™)โ€–], which measures how much the output changes as the input varies. Deep networks with skip connections have longer trajectories than shallow networks.

  • Fisher-Rao norm: โ„ฐ(๐’œ)=๐œฝโŠคโ„ฑโก(๐œฝ)๐œฝ, which weights each parameter by its Fisher information (its importance for the output distribution).

  • Spectral complexity: โ„ฐ(๐’œ)=โˆl=1Lโ€–๐–lโ€–op, the product of spectral norms of the weight matrices, which controls the Lipschitz constant of the network.

A good expressiveness measure should satisfy: (1) it is computable without training the network, (2) it correlates with downstream performance across different tasks, and (3) it provides non-vacuous generalization bounds. No existing measure satisfies all three desiderata.

Practical Challenges

Beyond the theoretical gaps identified above, several practical challenges limit the impact of NAS in real-world AI development. These challenges are not merely engineering obstacles; they reflect fundamental tensions between the goals of NAS (finding good architectures) and the constraints of practical deployment (reproducibility, transferability, computational cost). Addressing these challenges requires both algorithmic innovation and a more rigorous experimental methodology.

The reproducibility crisis.

Many published NAS methods have been shown to perform no better than random search when evaluated fairly [84][40]. The reasons include:

  • Unfair baselines: NAS papers often compare against poorly tuned baselines rather than state-of-the-art architectures.

  • Search space contribution: much of the reported improvement comes from the design of the search space (which constrains the search to good architectures) rather than from the search algorithm itself.

  • Training pipeline variations: differences in training procedures (learning rate schedules, data augmentation, regularization) between the NAS-found architecture and the baseline can account for the reported accuracy difference.

  • Seed sensitivity: NAS results can be highly sensitive to random seeds, and many papers report only the best run.

Research 8.

Research Direction: NAS with Formal Certificates. Develop NAS methods that provably outperform random search by a guaranteed margin, with formal certificates of improvement. Specifically, given a search space ๐’ฎ and a compute budget B, design a search algorithm ๐’ฌ such that ๐”ผ[โ„’(๐’ฌ(B))]โ‰ค๐”ผ[โ„’(Random(B))]โˆ’ฮ”(B,|๐’ฎ|), where ฮ”>0 is a provable improvement margin that depends on the budget and search space size. Such certificates would distinguish genuine algorithmic contributions from search space engineering.

The benchmark problem.

NAS-Bench-101 [41] and NAS-Bench-201 [42] provide pre-computed results for all architectures in small search spaces, enabling reproducible comparison of search algorithms. These benchmarks have been invaluable for the field, but they are too small (at most โˆผ106 architectures) to capture the challenges of real-world NAS, where search spaces exceed 1015 architectures. Developing larger, more representative benchmarks that remain computationally tractable is an ongoing challenge.

Transferability.

Do NAS-discovered architectures transfer across datasets, tasks, and modalities? The evidence is mixed. Architectures found on CIFAR-10 often transfer well to ImageNet for image classification [51]. But architectures optimized for one task (classification) may not transfer to a different task (generation, segmentation, detection) on the same data. Cross-modal transfer (from vision to language, from language to audio) is even less understood.

The transferability question can be formalized through the lens of task similarity. Let d(๐’ฏ1,๐’ฏ2) be a distance between tasks (for example, the โ„‹-divergence between the data distributions, or the cosine similarity of the optimal weight vectors). The transferability hypothesis states that if d(๐’ฏ1,๐’ฏ2) is small, then the optimal architectures for the two tasks are also similar: (Transferability)d๐’œ(๐’œ1โˆ—,๐’œ2โˆ—)โ‰คg(d(๐’ฏ1,๐’ฏ2)) for some increasing function g, where d๐’œ is a distance on architectures and ๐’œiโˆ— is the optimal architecture for task ๐’ฏi. Validating this hypothesis requires: (1) a meaningful task distance, (2) a meaningful architecture distance, and (3) NAS results on sufficiently many tasks to test the relationship statistically. All three ingredients are active research areas.

Computational accessibility.

Despite the >10,000ร— cost reduction from 800 GPU-days (NAS-RL, 2017) to <1 GPU-hour (zero-cost proxies, 2021), NAS still requires significant computational resources for large-scale problems. Searching for an architecture for a diffusion model or a large language model remains a multi-GPU endeavor. Making NAS accessible on a single consumer GPU for state-of-the-art generative models is an unsolved practical challenge.

Multi-objective NAS at scale.

Real-world deployment requires optimizing multiple objectives simultaneously: accuracy, latency, memory footprint, energy consumption, privacy, and fairness. The Pareto frontier of a k-objective problem lives in a (kโˆ’1)-dimensional space, and covering this space requires exponentially many evaluations in k. Current multi-objective NAS methods handle 2โ€“3 objectives reasonably well, but scaling to 5+ objectives (as required by production systems) remains challenging. Evolutionary multi-objective optimization (NSGA-II, MOEA/D) can handle many objectives in principle, but the per-evaluation cost of NAS makes these methods prohibitively expensive.

Research 9.

Research Direction: Many-Objective NAS. Develop NAS methods that efficiently handle kโ‰ฅ5 objectives. One promising approach is to decompose the many-objective problem into a set of single-objective subproblems (as in MOEA/D), where each subproblem corresponds to a different weighting of the objectives. The key challenge is sharing information across subproblems: an architecture evaluated for one weighting provides information about its performance under other weightings. A formal framework for information sharing in many-objective NAS, with provable bounds on the number of evaluations needed to approximate the full Pareto frontier, is an open problem.

NAS for foundation models.

The dominant architectures in modern AI (GPT-style transformers for language, U-Net and DiT for diffusion, ViT for vision) were all designed by human engineers. Applying NAS to foundation-model-scale problems (hundreds of billions of parameters, trillions of training tokens) is currently infeasible due to the cost of evaluating each candidate architecture. Even with weight sharing, training a supernet at foundation-model scale would cost millions of dollars. Proxy tasks (searching on small data and transferring to large data) offer a partial solution, but the quality of the transfer is unknown at these scales. This is perhaps the most important practical challenge in NAS: if architecture optimization matters most at scale (as the scaling laws discussion in Research 6 suggests), then our inability to run NAS at scale is a significant limitation.

Towards Self-Evolving AI

The long-term vision of NAS extends beyond optimizing architectures for specific tasks. It extends even beyond the practical challenges of reproducibility, transferability, and cost that we have just discussed. The ultimate goal is AI systems that design their own successors: systems whose architecture evolves over time, adapting to new tasks, new data, and new computational environments without human intervention. This vision connects NAS to the deepest questions in AI research, including recursive self-improvement, the alignment of self-modifying systems, and the fundamental limits of machine intelligence.

Recursive self-improvement through architecture search.

Consider a model M0 with architecture ๐’œ0 that has been trained to perform NAS. This model can search for an improved architecture ๐’œ1, train a new model M1 on ๐’œ1, and then use M1 to search for an even better architecture ๐’œ2. The sequence M0โ†’M1โ†’M2โ†’โ‹ฏ represents recursive self-improvement through architecture search.

The bootstrapping problem is immediate and bears careful examination. How can model Mk discover an architecture ๐’œk+1 that leads to a model Mk+1 that is strictly better than Mk? If Mk's NAS capability is limited by its own architecture, then there may be a ceiling beyond which self-improvement stalls. This ceiling corresponds to a fixed point of the NAS operator, and its existence or absence has profound implications for the long-term trajectory of AI development. Formally, if the quality of the NAS-found architecture depends on the quality of the NAS algorithm, which depends on the architecture of the model running the NAS algorithm, then we have a fixed-point problem: (Fixed Point)๐’œโˆ—=NAS(๐’œโˆ—), where NAS(๐’œ) denotes the best architecture found by the NAS algorithm running on architecture ๐’œ. The fixed point ๐’œโˆ— is the architecture that, when used to run NAS, discovers itself. Whether such a fixed point exists, whether it is unique, and whether iterative application of NAS converges to it are open mathematical questions.

fig:nas:recursive illustrates the recursive self-improvement process. Each generation Mk uses its NAS capability to discover an architecture ๐’œk+1 for the next generation. The key question is whether this process converges (the generations plateau at a fixed point), diverges (the generations improve without bound), or oscillates (the generations cycle between a finite set of architectures).

The convergence analysis depends on the properties of the NAS operator NAS(โ‹…) viewed as a map on the architecture space. If NAS is a contraction mapping in some metric on architectures (i.e., d(NAS(๐’œ1),NAS(๐’œ2))โ‰คฮณd(๐’œ1,๐’œ2) for some ฮณ<1), then by the Banach fixed-point theorem, the iteration converges to a unique fixed point. However, there is no reason to expect the NAS operator to be a contraction in general: small changes in the architecture running NAS could lead to large changes in the architecture discovered by NAS.

Caution.

Self-modifying architectures raise the most fundamental safety questions in AI. An AI system that can redesign its own architecture could potentially: (1) remove safety constraints embedded in its structure, (2) modify itself in ways that its designers cannot predict or understand, (3) undergo recursive self-improvement that rapidly exceeds human ability to evaluate. These are not speculative concerns; they are direct consequences of the mathematical framework we have developed in this chapter. The self-modification objective ((SELF Modify)) optimizes for reward, and if safety constraints are not formally embedded in the reward function or in inviolable architectural constraints, the optimization process may discover modifications that circumvent safety measures. Any deployment of self-modifying AI systems requires formal verification that the modification process preserves safety invariants.

Historical Note.

The concept of self-modifying programs dates to John von Neumann's work on self-replicating automata in the 1940s and 1950s. Von Neumann proved that a machine could contain a complete description of itself and use that description to construct a copy, establishing the theoretical possibility of machine self-replication. In 1965, I. J. Good introduced the concept of an โ€œintelligence explosionโ€: a machine that could design a more intelligent machine, which could in turn design an even more intelligent machine, leading to rapid recursive improvement [49]. Modern NAS is the first practical instantiation of machines that design (aspects of) other machines, albeit in a constrained form. The gap between current NAS (searching over cell structures within a fixed macro architecture) and Good's vision (machines designing entirely new machines) is vast, but the mathematical framework developed in this chapter shows that the gap is one of degree, not of kind.

Historical Timeline

The development of neural architecture search spans decades of work in neuroscience, evolutionary computation, and machine learning. Table 16 presents a comprehensive timeline of the key milestones, from the earliest mathematical models of neurons to the latest methods that use large language models and diffusion processes to generate architectures.

YearMethod / EventKey InnovationImpact
1943McCullochโ€“Pitts neuronFirst mathematical model of a neuron as a logical threshold unitF
1949Hebb's learning ruleโ€œNeurons that fire together wire togetherโ€; activity-dependent connectivityF
1962Hubel & WieselDiscovery of hierarchical visual processing in cat visual cortexF
1989Montana & DavisEarly neuroevolution: using genetic algorithms to optimize neural network weightsH
1994GruauCellular encoding: evolving network topologies using graph grammarsI
2002NEAT [50]Co-evolution of topology and weights through complexification; speciation for diversityH
2016Neural Architecture SearchHyperparameter optimization methods applied to architecture; Bayesian optimizationH
2017NAS-RL [18]RNN controller trained with RL to generate architectures; 800 GPU-days on CIFAR-10F
2018NASNet [51]Cell-based search space; search on CIFAR-10, transfer to ImageNetH
2018ENAS [24]Parameter sharing across architectures via supernet; 1,600ร— speedupH
2018AmoebaNet [22]Regularized evolution; age-based selection to maintain population diversityH
2019DARTS [25]Differentiable architecture search via continuous relaxation; 1.5 GPU-daysF
2019EfficientNet [35]Compound scaling of depth, width, and resolution; NAS for base architectureH
2019ProxylessNAS [31]Direct search on target task and hardware; latency-aware objectiveH
2019AutoGAN [52]First application of NAS to GAN architecture design; RL-based controllerH
2020PC-DARTSPartial channel connections to reduce memory; DARTS search in 0.1 GPU-daysI
2020FBNetV2DMaskingNAS: differentiable masking for channel and spatial searchI
2021NASWOTZero-cost proxy: evaluate architectures at initialization without any trainingH
2021NAS-Bench-SuiteUnified benchmark combining NAS-Bench-101, 201, 301 for fair comparisonH
2023DiT [43]Transformer replaces U-Net as the backbone for diffusion modelsH
2023NAS Survey [53]Comprehensive survey analyzing over 1,000 NAS papers; taxonomy and evaluationH
2024DiffusionNAG [54]Diffusion models as generators of neural architecturesH
2024GPT-NAS [55]Large language models as architecture search agentsH
2024LayerNAS [38]Dynamic programming for NAS; polynomial complexity in number of layersH
2024FlexiffusionTraining-free NAS for diffusion models using zero-cost proxiesI
2024Mamba [56]Selective state-space model; linear-time alternative to transformer attentionH

The timeline reveals several important patterns that inform our understanding of the field's trajectory and its likely future development.

The first pattern is the remarkable compression of progress. The transition from 800 GPU-days (NAS-RL, 2017) to zero-cost proxies (NASWOT, 2021) represents a >10,000ร— reduction in computational cost in just four years. To put this in perspective, the transition from room-sized mainframes to personal computers took approximately twenty years (1960s to 1980s). NAS has compressed two decades of computing history into four years of algorithmic innovation.

The second pattern is the convergence of methods. Despite vastly different starting points and motivations, NAS methods have progressively converged. Early NAS approaches were either evolutionary or reinforcement-learning-based, with little interaction between the two paradigms. DARTS introduced a third paradigm (gradient-based search), and recent methods increasingly combine elements from all three: evolutionary search for exploration, gradient-based refinement for exploitation, and RL for learning search policies. This convergence suggests that the field is maturing toward a unified methodology.

The third pattern is the expansion of scope. Early NAS focused exclusively on image classification (CIFAR-10, ImageNet). By 2019, NAS had expanded to GANs (AutoGAN), object detection, and semantic segmentation. By 2023, NAS had reached diffusion models (DiT) and language models. By 2024, NAS methods were themselves using generative models (DiffusionNAG, GPT-NAS). The field has gone from using NAS to optimize generative models to using generative models to perform NAS, completing a remarkable circle.

The fourth pattern is the progressive abstraction of the search space. The earliest NAS methods searched over individual operations at each layer (a flat search space). Cell-based search (NASNet, 2018) introduced a hierarchical abstraction: search for a cell, then tile the cell into a full network. DARTS (2019) abstracted the discrete search space into a continuous one. LayerNAS (2024) abstracted the problem into a dynamic program over layers. And DiffusionNAG (2024) abstracted the architecture itself into a generative model's latent space. Each level of abstraction brought both a reduction in search cost and a change in the types of architectures that could be discovered.

YearMethodGPU-Days
2017NAS-RL [18]800
2018ENAS [24]0.5
2019DARTS [25]1.5
2020PC-DARTS0.1
2021NASWOT (zero-cost)<0.01
2024LayerNAS [38]<0.01

Table 17 summarizes the cost reduction trajectory. The >80,000ร— reduction from NAS-RL to zero-cost methods is primarily an algorithmic achievement: the hardware used in 2021 is only about 3โ€“5ร— faster than the hardware used in 2017, so the remaining 16,000ร—โ€“27,000ร— reduction is due to better algorithms (weight sharing, continuous relaxation, zero-cost proxies, dynamic programming). This is one of the most dramatic examples of algorithmic improvement outpacing hardware improvement in the history of machine learning.

Historical Note.

The NAS Timeline in Perspective. The >10,000ร— reduction in NAS computational cost between 2017 and 2021 matches the trajectory of computing itself. Mainframes gave way to minicomputers, then to personal computers, then to smartphones, each transition bringing roughly a 100ร—โ€“1,000ร— cost reduction. NAS has compressed this trajectory into four years through purely algorithmic innovation (weight sharing, differentiable relaxation, zero-cost proxies), without relying on hardware improvements. This suggests that the primary bottleneck in NAS was never computational power, but rather our understanding of how to search efficiently. The remaining challenge is not to make NAS faster (it is already fast enough for many applications), but to make it more reliable, more transferable, and more theoretically understood.

Exercises

The exercises below range from computational warm-ups (computing search space sizes, performing gradient steps by hand) to theoretical challenges (proving NP-hardness, designing convergence experiments). The standard exercises (Exercises Exercise 13 through Exercise 22) test understanding of the core concepts developed in this chapter. The challenge exercises (Exercises Challenge 3 through Challenge 7) are open-ended problems suitable for research projects or advanced coursework. Many of the challenge exercises have no known complete solution; partial progress on any of them would constitute a genuine contribution to the field.

Exercise 13 (Search Space Counting).

Consider a cell-based search space where each cell has N nodes (excluding the input and output nodes) and K candidate operations. Each pair of nodes (i,j) with i<j is connected by an edge, and each edge is assigned one of the K operations.

  1. Show that the number of edges in a cell is (N2)=N(Nโˆ’1)/2.

  2. Show that the total number of architectures is |๐’ฎ|=KN(Nโˆ’1)/2.

  3. Compute |๐’ฎ| for N=7 and K=5. Express your answer as a power of 10. (Hint: use log10โก(521)=21log10โก5.)

  4. The number of atoms in the observable universe is approximately 1080. For K=5, find the smallest value of N such that |๐’ฎ|>1080. Repeat for K=8.

  5. Discuss the implications of these numbers for exhaustive search. If each architecture evaluation takes 1 second, how long would an exhaustive search take for N=7, K=5? Express your answer in years and compare to the age of the universe (โˆผ1.4ร—1010 years).

  6. Now consider a more realistic search space where each node j receives input from at most 2 predecessors (chosen from nodes 0,1,โ€ฆ,jโˆ’1). Show that the number of architectures reduces to โˆj=2N+1(j2)K2 and compute this for N=7, K=5. How much smaller is this than the unrestricted search space?

Exercise 14 (DARTS by Hand).

Consider a simplified DARTS cell with 2 intermediate nodes and 3 candidate operations {o1,o2,o3} (for example, 3ร—3 convolution, 5ร—5 convolution, and skip connection).

  1. Write out the DARTS continuous relaxation for this cell. Specifically, let ๐œถ(i,j)โˆˆโ„3โก be the architecture parameters for edge (i,j). Express the mixed output of each edge as oโ€พ(i,j)(๐’™)=โˆ‘k=13expโก(ฮฑk(i,j))โˆ‘l=13expโก(ฮฑl(i,j))ok(๐’™).

  2. Given the initial architecture parameters ๐œถ(0,2)=[1.0,0.5,0.1] and ๐œถ(1,2)=[0.3,0.8,0.2], compute the softmax weights for each edge. Which operations receive the most weight?

  3. Suppose the validation loss gradient with respect to the architecture parameters is โˆ‡๐œถ(0,2)โ„’val=[0.2,โˆ’0.3,0.1] and โˆ‡๐œถ(1,2)โ„’val=[โˆ’0.1,0.4,โˆ’0.3]. Compute one step of architecture gradient descent with learning rate ฮท๐œถ=0.01. Write the updated architecture parameters.

  4. After the update, recompute the softmax weights. Has the relative ranking of operations changed on either edge?

  5. Discretize the updated architecture by selecting the highest-weight operation on each edge. What is the final architecture?

  6. Repeat parts (c)โ€“(e) for 100 gradient steps (you may write a simple program or derive the trajectory analytically). Does the architecture change during these 100 steps? At what step (if any) does the architecture become โ€œlocked inโ€ (the same discretized architecture is selected for all subsequent steps)?

  7. Discuss the โ€œdiscretization gapโ€: the difference between the continuous relaxation's loss and the discretized architecture's loss. Why might this gap be large, and what techniques have been proposed to reduce it?

Exercise 15 (Information Bottleneck Convexity).

The information bottleneck objective is โ„’IB=๐–จโก(X;T)โˆ’ฮฒ๐–จโก(T;Y), where T is a compressed representation of X that retains information about Y, and ฮฒ>0 controls the tradeoff.

  1. Express ๐–จโก(X;T) and ๐–จโก(T;Y) in terms of the conditional distribution p(t|x), the marginal p(x), and the conditional p(y|x). Show that both quantities are convex functions of p(t|x) for fixed marginals.

  2. Prove that โ„’IB=๐–จโก(X;T)โˆ’ฮฒ๐–จโก(T;Y) is convex in p(t|x) for any fixed ฮฒ>0. (Hint: a convex combination of convex and concave functions with appropriate signs is convex.)

  3. Show that the minimizer of โ„’IB over p(t|x) satisfies the self-consistency equation p(t|x)=p(t)Z(x;ฮฒ)expโก(โˆ’ฮฒ๐–ฃKLโก[p(y|x)โ€–p(y|t)]), where Z(x;ฮฒ) is a normalization constant and ๐–ฃKLโก is the KL divergence.

  4. Discuss the implications for NAS: if the information bottleneck selects the optimal compression level, how does this relate to selecting the optimal width of a hidden layer?

Exercise 16 (Bilevel Optimization Reduction).

The NAS bilevel optimization problem is min๐œถโกโ„’val(๐œฝโˆ—(๐œถ),๐œถ),where๐œฝโˆ—(๐œถ)=argโ€‰min๐œฝโกโ„’train(๐œฝ,๐œถ).

  1. Show that when the inner problem has a closed-form solution ๐œฝโˆ—(๐œถ), the bilevel problem reduces to a single-level optimization min๐œถโกโ„’val(๐œฝโˆ—(๐œถ),๐œถ), and the gradient with respect to ๐œถ can be computed exactly using the chain rule.

  2. Give an example of a training loss function for which the inner problem has a closed-form solution. (Hint: consider a linear model f(๐’™;๐œฝ)=๐œฝโŠค๐’™ with squared loss.)

  3. For the linear model with squared loss, derive the closed-form solution ๐œฝโˆ—(๐œถ) and substitute it into the validation loss. Show that the resulting single-level objective is a function of ๐œถ alone.

  4. Compute โˆ‡๐œถโ„’val(๐œฝโˆ—(๐œถ),๐œถ) explicitly, using the implicit function theorem to handle the dependence of ๐œฝโˆ— on ๐œถ.

  5. Discuss why the bilevel formulation is necessary in practice: for nonlinear models, the inner problem does not have a closed-form solution, and we must approximate ๐œฝโˆ—(๐œถ) using iterative optimization. What are the consequences of using an approximate ๐œฝ^(๐œถ) instead of the true ๐œฝโˆ—(๐œถ)?

  6. Quantify the approximation error. If the inner optimization runs for K gradient steps with learning rate ฮท, and the training loss is ฮผ-strongly convex and L-smooth in ๐œฝ, bound โ€–๐œฝ^K(๐œถ)โˆ’๐œฝโˆ—(๐œถ)โ€– using the standard convergence rate of gradient descent. Then bound the resulting error in the architecture gradient โ€–โˆ‡๐œถโ„’val(๐œฝ^K,๐œถ)โˆ’โˆ‡๐œถโ„’val(๐œฝโˆ—,๐œถ)โ€– using the Lipschitz continuity of โˆ‡๐œถโ„’val.

Exercise 17 (Hardware-Aware Pareto Optimality).

Consider 5 architectures with the following (accuracy, latency) pairs: A=(0.92,10ms), B=(0.95,20ms), C=(0.91,15ms), D=(0.96,25ms), E=(0.93,12ms).

  1. Define Pareto dominance: architecture i dominates architecture j (written iโ‰ปj) if accuracyiโ‰ฅaccuracyj and latencyiโ‰คlatencyj, with at least one strict inequality.

  2. Identify all dominance relationships among the 5 architectures.

  3. Determine the Pareto-optimal set (the set of non-dominated architectures). Prove your answer by showing that each non-Pareto architecture is dominated by at least one Pareto architecture.

  4. Plot the architectures in the (latency, accuracy) plane and sketch the Pareto frontier.

  5. Suppose a user specifies a latency budget of 15ms. Which Pareto-optimal architecture should be selected? Formalize this as a constrained optimization problem: max๐’œโกaccuracy(๐’œ) subject to latency(๐’œ)โ‰ค15ms.

Exercise 18 (Weight Sharing Approximation Bound).

In ENAS and one-shot NAS, all architectures share weights from a single supernet. Let ๐œฝsuper denote the supernet weights, and let ๐œฝ๐’œ=extract(๐œฝsuper,๐’œ) denote the weights extracted for architecture ๐’œ.

  1. Let ๐œฝโˆ—(๐’œ)=argโ€‰min๐œฝโกโ„’(๐œฝ,๐’œ) be the optimal standalone weights for architecture ๐’œ. If โ„’ is L-Lipschitz in its first argument (i.e., |โ„’(๐œฝ1,๐’œ)โˆ’โ„’(๐œฝ2,๐’œ)|โ‰คLโ€–๐œฝ1โˆ’๐œฝ2โ€– for all ๐œฝ1,๐œฝ2), prove that the weight-sharing approximation error satisfies |โ„’(๐œฝ๐’œ,๐’œ)โˆ’โ„’(๐œฝโˆ—(๐’œ),๐’œ)|โ‰คLโ€–๐œฝ๐’œโˆ’๐œฝโˆ—(๐’œ)โ€–.

  2. Define ฮด(๐’œ)=โ€–๐œฝ๐’œโˆ’๐œฝโˆ—(๐’œ)โ€– as the weight-sharing gap for architecture ๐’œ. Show that if ฮด(๐’œ) is small for all ๐’œ, then the architecture ranking induced by the supernet is approximately correct.

  3. Give an example where the weight-sharing ranking can differ from the true ranking. (Hint: consider two architectures that share a layer, where the optimal weights for that layer differ significantly between the two architectures.)

  4. Derive conditions on the training procedure under which ฮด(๐’œ)โ†’0 as training progresses. (Hint: consider the case where each architecture is sampled equally often during supernet training.)

  5. The weight-sharing gap ฮด(๐’œ) may depend on the size of the search space |๐’ฎ|. Consider a supernet trained for T steps, where at each step one architecture is uniformly sampled and its weights are updated. Each architecture is updated approximately T/|๐’ฎ| times. If each update moves the weights toward the standalone optimum by a factor of (1โˆ’ฮทฮผ) (for ฮผ-strongly convex loss), bound ฮด(๐’œ) as a function of T, |๐’ฎ|, ฮท, and ฮผ. Show that convergence to ฮด=0 requires T=ฮฉ(|๐’ฎ|โ‹…logโก(1/ฯต)/(ฮทฮผ)) steps.

Exercise 19 (NAS for a Simple Generative Model).

Consider a 3-layer variational autoencoder where each encoder layer and each decoder layer can independently be one of four operations: Dense-256, Dense-512, Conv-32 (3ร—3, 32 filters), or Conv-64 (3ร—3, 64 filters).

  1. How many total encoder architectures are possible? How many total (encoder, decoder) architecture pairs are possible?

  2. For each dataset below, discuss which architectures would be favored by NAS optimizing the ELBO, and why: itemize

  3. MNIST (28ร—28 grayscale images)

  4. CIFAR-10 (32ร—32 color images)

  5. CelebA (64ร—64 color images) itemize

  6. Compute the total parameter count for three specific architectures: (i) all Dense-256, (ii) all Conv-32, (iii) a mixed architecture with Conv-64, Conv-32, Dense-256. Assume the input is 32ร—32ร—3 and appropriate reshaping is applied between convolutional and dense layers.

  7. Discuss the tradeoff between parameter count and reconstruction quality for each architecture. How does the choice of architecture affect the KL divergence term in the ELBO?

  8. For each of the 64 encoder architectures, estimate the computational cost (FLOPs) of a single forward pass, assuming Dense layers cost 2โ‹…input_dimโ‹…output_dim FLOPs and Conv layers cost 2โ‹…k2โ‹…cinโ‹…coutโ‹…hโ‹…w FLOPs. Which architecture has the best accuracy-per-FLOP ratio for each dataset?

  9. Suppose you are limited to a total parameter budget of 500,000 parameters for the entire VAE (encoder + decoder). Which (encoder, decoder) pairs satisfy this constraint? Among these, which would you expect NAS to select for CelebA, and why?

Exercise 20 (Dynamic Programming for LayerNAS).

Consider a 4-layer network where each layer can use one of 3 operations: o1 (cost 1, quality 0.3), o2 (cost 2, quality 0.5), or o3 (cost 3, quality 0.7). The total quality of an architecture is the product of per-layer qualities, and the total cost is the sum of per-layer costs. There are 2 budget groups: โ€œlowโ€ (total cost โ‰ค6) and โ€œhighโ€ (total cost โ‰ค10).

  1. Define the DP state: let V(l,c) be the maximum quality achievable using layers 1,โ€ฆ,l with total cost โ‰คc. Write the recurrence relation.

  2. Initialize the DP table: V(0,c)=1 for all c (the โ€œempty architectureโ€ has quality 1).

  3. Fill in the DP table for l=1,2,3,4 and c=1,2,โ€ฆ,10. Show your work at each step.

  4. Identify the optimal architecture for the โ€œlowโ€ budget (cโ‰ค6) and the โ€œhighโ€ budget (cโ‰ค10).

  5. Compare the DP solution to exhaustive search. How many architectures does exhaustive search evaluate? How many DP subproblems are solved? What is the computational advantage?

  6. Extend the DP formulation to handle an additional constraint: each layer's operation must be at least as expensive as the previous layer's operation (a โ€œmonotonically increasing complexityโ€ constraint). Modify the state to V(l,c,oprev) where oprev is the operation used in layer lโˆ’1. How does this change the time complexity?

  7. Prove that the DP approach yields the globally optimal architecture (not just a local optimum) for the case where the total quality is the product of per-layer qualities and the total cost is the sum of per-layer costs. Under what conditions on the quality function does the DP approach fail to find the global optimum? (Hint: consider quality functions that depend on pairs of adjacent layers, not just individual layers.)

Exercise 21 (Pruning as NAS).

Structured pruning removes entire channels, filters, or layers from a trained network. This exercise formalizes the connection between pruning and NAS.

  1. Let ๐’œfull be a fully connected architecture with L layers of widths w1,โ€ฆ,wL. Define the pruning search space ๐’ฎprune as the set of all architectures obtainable by setting some widths to zero or reducing them: ๐’ฎprune={(w1โ€ฒ,โ€ฆ,wLโ€ฒ):0โ‰คwlโ€ฒโ‰คwlย forย allย l}. How many architectures are in ๐’ฎprune?

  2. Show that ๐’ฎpruneโІ๐’ฎfull where ๐’ฎfull is the full NAS search space over all architectures with up to L layers and maximum width maxlโกwl.

  3. Prove that the optimal pruned architecture ๐’œpruneโˆ—=argโ€‰min๐’œโˆˆ๐’ฎpruneโกโ„’(๐’œ) is at least as good as the full architecture if we also allow the weights to be re-optimized after pruning (i.e., the full architecture is in the pruning search space with wlโ€ฒ=wl for all l).

  4. Discuss the advantage of pruning over general NAS: the weights of the pruned architecture can be initialized from the trained full model, avoiding the cost of training from scratch. Formalize this as a warm-start guarantee: if the pruned model's loss after initialization is โ„’(๐œฝprune) and the optimal loss is โ„’โˆ—, bound the gap โ„’(๐œฝprune)โˆ’โ„’โˆ— in terms of the pruning fraction and the spectral properties of the Hessian.

  5. Show that iterating pruning and retraining (the โ€œlottery ticketโ€ procedure) is equivalent to a greedy search in the pruning search space ๐’ฎprune. Under what conditions on the loss landscape does greedy search find the optimal pruned architecture? (Hint: consider submodularity of the โ€œretained accuracyโ€ function.)

Exercise 22 (Forgetting Under Architecture Change).

Consider a two-layer network f(๐’™;๐–1,๐–2)=๐–2ฯƒ(๐–1๐’™) where ๐–1โˆˆโ„mร—dโก and ๐–2โˆˆโ„kร—mโก, and ฯƒ is the ReLU activation. The architecture change consists of adding ฮ”m new neurons to the hidden layer, yielding ๐–1โ€ฒโˆˆโ„(m+ฮ”m)ร—dโก and ๐–2โ€ฒโˆˆโ„kร—(m+ฮ”m)โก.

  1. Partition the new weight matrices as ๐–1โ€ฒ=[๐–1ฮ”๐–1] and ๐–2โ€ฒ=[๐–2ฮ”๐–2], where ฮ”๐–1โˆˆโ„ฮ”mร—dโก and ฮ”๐–2โˆˆโ„kร—ฮ”mโก are the weights of the new neurons.

  2. Show that the change in the network output is f(๐’™;๐–1โ€ฒ,๐–2โ€ฒ)โˆ’f(๐’™;๐–1,๐–2)=ฮ”๐–2ฯƒ(ฮ”๐–1๐’™).

  3. Bound the forgetting on the old task. If the old task loss is โ„’old(๐œฝ)=๐”ผ(๐’™,๐’š)โˆผPold[โ„“(f(๐’™;๐œฝ),๐’š)] and โ„“ is Lโ„“-Lipschitz in its first argument, show that |โ„’old(๐œฝโ€ฒ)โˆ’โ„’old(๐œฝ)|โ‰คLโ„“โ€–ฮ”๐–2โ€–๐”ผ[โ€–ฯƒ(ฮ”๐–1๐’™)โ€–].

  4. For Gaussian inputs ๐’™โˆผNormalโก(0,๐ˆd) and Kaiming initialization (ฮ”๐–1)ijโˆผNormalโก(0,2/d), compute ๐”ผ[โ€–ฯƒ(ฮ”๐–1๐’™)โ€–2] in terms of ฮ”m and d.

  5. Use the result from (d) to express the forgetting bound in terms of ฮ”m, d, โ€–ฮ”๐–2โ€–, and the Fisher information โ„ฑโก=๐”ผ[โˆ‡๐œฝโ„“โˆ‡๐œฝโ„“โŠค]. Discuss how the initialization of ฮ”๐–2 controls forgetting: if ฮ”๐–2 is initialized to zero, the forgetting is exactly zero.

  6. Now consider the effect of training the expanded network on a new task. After T gradient steps with learning rate ฮท on the new task, the new weights evolve to ฮ”๐–2(T). Bound โ€–ฮ”๐–2(T)โ€– in terms of T, ฮท, and the gradient norms on the new task. Combine with the forgetting bound from (e) to obtain a bound on forgetting as a function of the number of training steps on the new task.

  7. Discuss strategies to reduce forgetting while still learning the new task effectively. Consider: (i) small learning rate for new heads, (ii) L2 regularization toward zero initialization, (iii) gradient projection to ensure new-task gradients are orthogonal to old-task gradients. For strategy (iii), prove that if โˆ‡ฮ”๐–2โ„’newโŸ‚โˆ‡ฮ”๐–2โ„’old, then a gradient step on the new task does not increase the old-task loss (to first order).

Challenge 3 (NAS Hardness).

This exercise establishes the computational hardness of finding optimal architectures in a general search space.

  1. Define the NAS decision problem: given a search space ๐’ฎ (defined by N nodes and K operations), a training set D, and a target loss ฯ„, does there exist an architecture ๐’œโˆˆ๐’ฎ with โ„’(๐’œ,D)โ‰คฯ„?

  2. Reduce graph K-coloring to the NAS decision problem. Given a graph G=(V,E) with |V|=N vertices, construct a NAS instance where: itemize

  3. Each vertex corresponds to a node in the NAS search space.

  4. Each color corresponds to one of K operations.

  5. The loss function penalizes adjacent nodes that use the same operation: โ„’(๐’œ)=โˆ‘(i,j)โˆˆE๐Ÿ™โก[oi=oj]. itemize Show that โ„’(๐’œ)=0 if and only if the operation assignment corresponds to a valid K-coloring of G.

  6. Since K-coloring is NP-complete for Kโ‰ฅ3, conclude that the NAS decision problem is NP-hard.

  7. Discuss the implications: the NP-hardness result applies to worst-case instances. Real NAS problems may have additional structure (smoothness, modularity, bounded treewidth) that makes them tractable. Identify at least two structural properties that could enable polynomial-time NAS algorithms.

  8. Prove that even approximate NAS (finding an architecture within a factor c of optimal) is NP-hard for some constant c>1, by relating it to the inapproximability of chromatic number.

  9. Discuss the relationship between NP-hardness and practical solvability. Many NP-hard problems (SAT, integer programming, traveling salesman) are routinely solved for large instances using heuristics, branch-and-bound, or approximation algorithms. What structural properties of real NAS instances might make them easier than worst-case instances? Consider at least: (i) the smoothness of the architecture-performance landscape, (ii) the hierarchical structure of cell-based search spaces, and (iii) the availability of gradient information in differentiable NAS.

Challenge 4 (Sleep-Inspired NAS for Diffusion Models).

Design a complete sleep-inspired NAS algorithm for a diffusion model, drawing on the neuroscience foundations from early in this chapter.

  1. Wake phase. Specify what is learned during the wake phase. The model trains on real data, updating both the denoiser weights ๐œฝ and collecting architecture statistics st=(at(l),gt(l))l=1L where at(l) is the average activation magnitude in layer l and gt(l) is the gradient magnitude. Define a โ€œsleep triggerโ€ criterion based on these statistics.

  2. Sleep phase. During sleep, the model does not see real data. Instead, it replays synthetic data generated by the model itself (using the current denoiser to generate samples, then using those samples as training data for architecture evaluation). Specify the replay mechanism and the architecture modification procedure. Define at least three types of modifications: adding layers, pruning channels, and changing operation types.

  3. Consolidation criteria. Define mathematically when to prune (a channel is pruned if its contribution to the denoising score is below threshold ฯ„p) and when to grow (a layer is added if the reconstruction error exceeds threshold ฯ„g). Express these thresholds in terms of the architecture statistics.

  4. Convergence guarantee. Define the joint architecture-weight objective ๐’ฅ(๐’œ,๐œฝ)=๐”ผt,๐’™0,๐[โ€–๐โˆ’๐๐œฝ(๐’™t,t)โ€–2]+ฮป|๐’œ| where |๐’œ| is the architecture size and ฮป>0. Prove that your algorithm produces a non-increasing sequence ๐’ฅ(๐’œk,๐œฝk)โ‰ฅ๐’ฅ(๐’œk+1,๐œฝk+1) after each wake-sleep cycle, and conclude convergence to a local minimum. (Hint: show that the wake phase decreases ๐’ฅ by decreasing the denoising loss for fixed architecture, and the sleep phase decreases ๐’ฅ by finding a smaller architecture with loss no worse than the pruning threshold ฯ„p.)

  5. Comparison to standard NAS. Compare the computational cost of your sleep-inspired algorithm to DARTS applied to the same diffusion model. Identify the key computational savings (if any) and the potential quality tradeoffs. Under what conditions does the sleep-inspired approach outperform DARTS?

Challenge 5 (Privacy-Aware NAS).

Formulate an NAS objective that jointly optimizes generation quality and differential privacy guarantees.

  1. Define the bi-objective NAS problem: min๐’œโก(FID(๐’œ),ฮต(๐’œ)), where FID(๐’œ) is the Frรฉchet Inception Distance achieved by architecture ๐’œ trained with DP-SGD, and ฮต(๐’œ) is the privacy budget consumed during training. Express ฮต(๐’œ) in terms of the noise multiplier ฯƒDP, the number of training steps T, the sampling rate q, and the architecture's gradient sensitivity S(๐’œ).

  2. Prove that the Pareto frontier of this bi-objective problem is non-empty and contains at least one non-trivial point (neither the โ€œzero privacyโ€ extreme ฮต=โˆž nor the โ€œinfinite noiseโ€ extreme FID=FIDrandom). (Hint: use the intermediate value theorem on the continuous tradeoff curve parameterized by ฯƒDP.)

  3. Prove that the Pareto frontier contains at least two distinct architectures, by showing that the optimal architecture at low ฮต (strong privacy) differs from the optimal architecture at high ฮต (weak privacy). (Hint: under strong privacy, smaller architectures dominate because they require less noise to achieve the same ฮต; under weak privacy, larger architectures dominate because they can fit the data better.)

  4. Design a practical NAS algorithm for this bi-objective problem. Specify the search strategy, the privacy accounting mechanism, and the Pareto selection criterion. Discuss the computational overhead compared to standard (non-private) NAS.

  5. Derive the Pareto-optimal architecture size |๐’œโˆ—| as a function of ฮต, n (training set size), and d (data dimensionality). Show that |๐’œโˆ—|=ฮ˜(ฮต2n/d) under appropriate assumptions on the loss landscape.

Challenge 6 (Self-Adapting Large Language Model).

Propose and analyze a transformer architecture that can grow additional attention heads during fine-tuning for new tasks, while provably preserving performance on old tasks.

  1. Architecture specification. Define a transformer layer with H base attention heads and a โ€œgrowth slotโ€ that can accommodate up to ฮ”H additional heads. Write the multi-head attention computation as MHA(๐’™)=โˆ‘h=1H๐–O(h)Attn(h)(๐’™)+โˆ‘h=H+1H+ฮ”H๐–O(h)Attn(h)(๐’™), where the second sum runs over the new heads.

  2. Initialization. Specify how new heads are initialized. Propose initializing ๐–O(h)=0 for h>H (zero initialization of the output projection) so that the new heads contribute nothing at initialization. Prove that this ensures MHAnew(๐’™)=MHAold(๐’™) for all ๐’™ at the moment of expansion.

  3. Integration. During fine-tuning on a new task, the new heads are trained while the old heads are frozen. Show that the total model output changes by exactly ฮ”f(๐’™)=โˆ‘h=H+1H+ฮ”H๐–O(h)Attn(h)(๐’™), which depends only on the new heads.

  4. Zero-forgetting proof. Let โ„’old be the loss on the old task. Prove that if the old heads are frozen and ฮ”f(๐’™)=0 for all inputs from the old task's distribution, then forgetting is exactly zero: โ„’old(๐œฝโ€ฒ)=โ„’old(๐œฝ). Discuss when the condition ฮ”f(๐’™)=0 can be relaxed to โ€–ฮ”f(๐’™)โ€–โ‰คฯต with bounded forgetting |โ„’old(๐œฝโ€ฒ)โˆ’โ„’old(๐œฝ)|โ‰คLโ„“ฯต.

  5. Capacity analysis. After T task expansions, each adding ฮ”H heads, the model has H+Tฮ”H heads per layer. Analyze the computational cost (FLOPs per forward pass) as a function of T. Specifically, if each attention head has dimension dh and the sequence length is L, show that the multi-head attention FLOPs scale as O((H+Tฮ”H)โ‹…L2โ‹…dh).

  6. Pruning with safety. Propose a pruning strategy for the new heads that keeps the total head count bounded while preserving the zero-forgetting guarantee on all previous tasks. The key constraint is that a new head added for task t can only be pruned if it does not affect the output on any task tโ€ฒโ‰คt. Formalize this constraint and show that it reduces to checking whether the head's output projection ๐–O(h) contributes to the outputs for tasks tโ€ฒโ‰คt. If the head was added for task t and is only active for inputs from task t (zero output on inputs from tasks tโ€ฒ<t), show that it can be safely pruned without affecting any previous task.

  7. Information-theoretic analysis. Each new head adds 3dhdmodel+dhdmodel parameters (for ๐–Q,๐–K,๐–V,๐–O). After T tasks, the total added parameter count is 4Tฮ”Hdhdmodel. Derive the minimum ฮ”H required to achieve loss ฯตt on task t, as a function of the task's intrinsic complexity (measured by the mutual information ๐–จโก(Xt;Yt) between inputs and targets).

Challenge 7 (Architecture Convergence Experiment Design).

Design a rigorous experiment to test the conjecture that independent NAS runs on the same task converge to structurally similar architectures (the โ€œArchitecture Convergence Conjectureโ€).

  1. Search space. Define a cell-based search space with at least 1015 architectures. Specify the number of nodes N, the number of operations K, and the cell structure. Verify that KN(Nโˆ’1)/2โ‰ฅ1015.

  2. Search budget. Determine the search budget B (number of architecture evaluations) for each independent run. Justify your choice of B by analyzing the exploration-exploitation tradeoff: B must be large enough to find good architectures but small enough that convergence to similar architectures is non-trivial (if B=|๐’ฎ|, exhaustive search trivially โ€œconvergesโ€ to the optimum).

  3. Structural similarity metric. Define a metric d(๐’œ1,๐’œ2) that measures the structural similarity between two architectures. Consider at least three options: edit distance (number of operation substitutions), graph isomorphism distance, and performance-based distance (|L(๐’œ1)โˆ’L(๐’œ2)|). Discuss the strengths and weaknesses of each.

  4. Statistical test. Propose a statistical test for whether independently discovered architectures are โ€œmore similar than expected by chance.โ€ The null hypothesis H0 is that the discovered architectures are independent uniform samples from ๐’ฎ. The alternative H1 is that the discovered architectures cluster around one or more โ€œattractorโ€ architectures. Derive the distribution of d(๐’œ1,๐’œ2) under H0 for your chosen metric.

  5. Power analysis. Compute the number of independent NAS runs R needed to reject H0 with power 0.8 at significance level ฮฑ=0.01, as a function of the effect size (the expected structural similarity under H1). Discuss the computational cost of the entire experiment: Rร—B architecture evaluations.

  6. Controls and confounds. Design the control experiments needed to make the results interpretable: itemize

  7. Random search control: run R independent random search experiments with the same budget B and measure the pairwise similarity of the best-found architectures. This establishes the baseline similarity under uninformed search.

  8. Search algorithm control: repeat the experiment with different NAS algorithms (DARTS, evolutionary, RL-based) and test whether convergence depends on the search algorithm or is a property of the search space.

  9. Task control: repeat the experiment on different tasks and test whether convergence is task-dependent. itemize Discuss how each control addresses a specific confound.

  10. Interpretation. If the experiment rejects H0 (architectures are more similar than chance), what conclusions can and cannot be drawn? Discuss: (i) the difference between convergence to a single optimum and convergence to a small set of near-optimal architectures, (ii) whether convergence implies that the architecture-performance landscape has a single basin of attraction, and (iii) the practical implications for NAS practitioners (if convergence holds, a single NAS run may suffice; if not, multiple runs with diversity are essential).

Remark 18.

This chapter has covered a vast territory, from the biological mechanisms of synaptic pruning that sculpt the brain during development, to the mathematical formulations that turn architecture design into an optimization problem, to the practical algorithms that search over trillions of possible architectures in hours rather than years. The key themes are worth restating. First, architecture is not a fixed design choice but a variable to be optimized, and the tools for this optimization (reinforcement learning, evolutionary strategies, differentiable relaxation, zero-cost proxies, generative models) have matured rapidly. Second, architecture interacts with every other aspect of machine learning: privacy, alignment, continual learning, and agency are all affected by and can benefit from architecture search. Third, the theoretical foundations remain underdeveloped relative to the empirical achievements, creating rich opportunities for future research. The reader who has worked through this chapter is equipped to contribute to all three of these fronts.

Historical Note.

From Cajal to NAS. In the 1890s, Santiago Ramรณn y Cajal used the Golgi staining technique to reveal the intricate architecture of the nervous system, establishing that the brain is composed of individual neurons connected in specific patterns. His drawings of cortical circuits, with their carefully delineated layers and connections, were the first โ€œarchitecture diagramsโ€ of a neural network. A century later, Warren McCulloch and Walter Pitts showed that networks of simplified neurons could compute logical functions, and Donald Hebb proposed that the connections between neurons are shaped by experience. These ideas were formalized into the connectionist program of the 1980s, which gave us backpropagation and the first trainable neural networks.

For decades, the architecture of these networks was designed by hand: the number of layers, the width of each layer, the type of connections, the activation functions. Each design decision was made by a human engineer based on intuition, experience, and trial and error. The breakthrough insight of neural architecture search was that this design process itself could be automated. Rather than designing an architecture, we design a search space and a search algorithm, and let the machine find the architecture.

The intellectual lineage from Cajal to NAS traces a remarkable arc. Cajal revealed that the brain's architecture is not arbitrary but highly structured, optimized by evolution for the computational tasks that organisms face. Modern NAS takes this insight to its logical conclusion: if architecture matters, and if the space of possible architectures is too vast for human intuition to navigate, then we must build machines that search this space for us. The brain was architecture-searched by evolution over millions of years. NAS accomplishes a simplified version of this search in hours. The distance between these two timescales measures the progress of our understanding, and the distance that remains measures the scope of our ignorance.

Yet the analogy between biological evolution and NAS is imperfect in illuminating ways. Evolution operates on the genotype (the genetic encoding of architecture) and evaluates the phenotype (the organism's fitness over a lifetime). NAS operates on the architecture directly and evaluates it on a fixed validation set. Evolution has no gradient signal; NAS (in its differentiable forms) does. Evolution maintains a diverse population; many NAS methods converge to a single architecture. Evolution optimizes for reproductive fitness in a changing environment; NAS optimizes for loss on a static task.

These differences suggest that the next generation of architecture search methods may benefit from incorporating more of evolution's strengths: population diversity, changing environments, lifetime learning, and the genotype-phenotype distinction. The methods that emerge from this synthesis may look very different from current NAS, but they will share the same fundamental insight that Cajal's drawings first revealed: architecture matters.

References

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    BibTeX
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    @article{pham2018efficient,
      author    = {Pham, Hieu and Guan, Melody Y. and Zoph, Barret and Le, Quoc V. and Dean, Jeff},
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    @inproceedings{chu2021fairnas,
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    @inproceedings{bender2018understanding,
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      year={2018}
    }

    Conference paper

  18. Neural Architecture Search with Reinforcement Learning

    Barret Zoph, Quoc V. Le

    International Conference on Learning Representations ยท 2017

    BibTeX
    @inproceedings{zoph2017nas,
      title={Neural Architecture Search with Reinforcement Learning},
      author={Zoph, Barret and Le, Quoc V.},
      booktitle={International Conference on Learning Representations},
      year={2017}
    }

    Conference paper

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  20. Proximal Policy Optimization Algorithms

    John Schulman, Filip Wolski, Prafulla Dhariwal, Alec Radford, Oleg Klimov

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    BibTeX
    @article{schulman2017ppo,
      author    = {Schulman, John and Wolski, Filip and Dhariwal, Prafulla and Radford, Alec and Klimov, Oleg},
      title     = {Proximal Policy Optimization Algorithms},
      journal   = {arXiv preprint arXiv:1707.06347},
      year      = {2017}
    }

    Journal article

  21. Designing Neural Network Architectures using Reinforcement Learning

    Bowen Baker, Otkrist Gupta, Nikhil Naik, Ramesh Raskar

    Proceedings of ICLR ยท 2017

    BibTeX
    @article{baker2017metaqnn,
      author    = {Baker, Bowen and Gupta, Otkrist and Naik, Nikhil and Raskar, Ramesh},
      title     = {Designing Neural Network Architectures using Reinforcement Learning},
      journal   = {Proceedings of ICLR},
      year      = {2017}
    }

    Journal article

  22. Regularized Evolution for Image Classifier Architecture Search

    Esteban Real, Alok Aggarwal, Yanping Huang, Quoc V. Le

    Proceedings of the AAAI Conference on Artificial Intelligence, vol. 33, pp. 4780-4789 ยท 2019

    BibTeX
    @inproceedings{real2019regularized,
      title={Regularized Evolution for Image Classifier Architecture Search},
      author={Real, Esteban and Aggarwal, Alok and Huang, Yanping and Le, Quoc V.},
      booktitle={Proceedings of the AAAI Conference on Artificial Intelligence},
      volume={33},
      pages={4780--4789},
      year={2019}
    }

    Conference paper

  23. Learning Transferable Architectures for Scalable Image Recognition

    Barret Zoph, Vijay Vasudevan, Jonathon Shlens, Quoc V. Le

    IEEE/CVF Conference on Computer Vision and Pattern Recognition, pp. 8697-8710 ยท 2018

    BibTeX
    @inproceedings{zoph2018nasnet,
      title={Learning Transferable Architectures for Scalable Image Recognition},
      author={Zoph, Barret and Vasudevan, Vijay and Shlens, Jonathon and Le, Quoc V.},
      booktitle={IEEE/CVF Conference on Computer Vision and Pattern Recognition},
      pages={8697--8710},
      year={2018}
    }

    Conference paper

  24. Efficient Neural Architecture Search via Parameter Sharing

    Hieu Pham, Melody Y. Guan, Barret Zoph, Quoc V. Le, Jeff Dean

    Proceedings of the International Conference on Machine Learning (ICML) ยท 2018

    BibTeX
    @inproceedings{pham2018enas,
      title={Efficient Neural Architecture Search via Parameter Sharing},
      author={Pham, Hieu and Guan, Melody Y. and Zoph, Barret and Le, Quoc V. and Dean, Jeff},
      booktitle={Proceedings of the International Conference on Machine Learning (ICML)},
      year={2018}
    }

    Conference paper

  25. DARTS: Differentiable Architecture Search

    Hanxiao Liu, Karen Simonyan, Yiming Yang

    International Conference on Learning Representations ยท 2019

    BibTeX
    @inproceedings{liu2019darts,
      title={{DARTS}: Differentiable Architecture Search},
      author={Liu, Hanxiao and Simonyan, Karen and Yang, Yiming},
      booktitle={International Conference on Learning Representations},
      year={2019}
    }

    Conference paper

  26. DARTS+: Improved Differentiable Architecture Search with Early Stopping

    Hanwen Liang, Shifeng Zhang, Jiacheng Sun, Xinggang He, Wenyu Huang, Kezhong Zhuang, Zhiyong Li

    arXiv preprint arXiv:1909.06035 ยท 2019

    BibTeX
    @article{liang2019dartsplus,
      author    = {Liang, Hanwen and Zhang, Shifeng and Sun, Jiacheng and He, Xinggang and Huang, Wenyu and Zhuang, Kezhong and Li, Zhiyong},
      title     = {{DARTS+}: Improved Differentiable Architecture Search with Early Stopping},
      journal   = {arXiv preprint arXiv:1909.06035},
      year      = {2019}
    }

    Journal article

  27. Progressive DARTS: Bridging the Optimization Gap for NAS in the Wild

    Xin Chen, Lingxi Xie, Jun Wu, Qi Tian

    International Journal of Computer Vision, vol. 128, pp. 2094-2111 ยท 2019

    BibTeX
    @article{chen2019pdarts,
      author    = {Chen, Xin and Xie, Lingxi and Wu, Jun and Tian, Qi},
      title     = {Progressive {DARTS}: Bridging the Optimization Gap for {NAS} in the Wild},
      journal   = {International Journal of Computer Vision},
      volume    = {128},
      pages     = {2094--2111},
      year      = {2019}
    }

    Journal article

  28. PC-DARTS: Partial Channel Connections for Memory-Efficient Architecture Search

    Yuhui Xu, Lingxi Xie, Xiaopeng Zhang, Xin Chen, Guo-Jun Qi, Qi Tian, Hongkai Xiong

    International Conference on Learning Representations ยท 2020

    BibTeX
    @inproceedings{xu2020pcdarts,
      title={{PC-DARTS}: Partial Channel Connections for Memory-Efficient Architecture Search},
      author={Xu, Yuhui and Xie, Lingxi and Zhang, Xiaopeng and Chen, Xin and Qi, Guo-Jun and Tian, Qi and Xiong, Hongkai},
      booktitle={International Conference on Learning Representations},
      year={2020}
    }

    Conference paper

  29. Fair DARTS: Eliminating Unfair Advantages in Differentiable Architecture Search

    Xiangxiang Chu, Tianbao Zhou, Bo Zhang, Jixiang Li

    Proceedings of ECCV ยท 2020

    BibTeX
    @article{chu2020fairdarts,
      author    = {Chu, Xiangxiang and Zhou, Tianbao and Zhang, Bo and Li, Jixiang},
      title     = {Fair {DARTS}: Eliminating Unfair Advantages in Differentiable Architecture Search},
      journal   = {Proceedings of ECCV},
      year      = {2020}
    }

    Journal article

  30. Searching for a Robust Neural Architecture in Four GPU Hours

    Xuanyi Dong, Yi Yang

    Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR) ยท 2019

    BibTeX
    @inproceedings{dong2019gdas,
      title={Searching for a Robust Neural Architecture in Four {GPU} Hours},
      author={Dong, Xuanyi and Yang, Yi},
      booktitle={Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR)},
      year={2019}
    }

    Conference paper

  31. ProxylessNAS: Direct Neural Architecture Search on Target Task and Hardware

    Han Cai, Ligeng Zhu, Song Han

    International Conference on Learning Representations ยท 2019

    BibTeX
    @inproceedings{cai2019proxylessnas,
      title={{ProxylessNAS}: Direct Neural Architecture Search on Target Task and Hardware},
      author={Cai, Han and Zhu, Ligeng and Han, Song},
      booktitle={International Conference on Learning Representations},
      year={2019}
    }

    Conference paper

  32. FBNet: Hardware-Aware Efficient ConvNet Design via Differentiable Neural Architecture Search

    Bichen Wu, Xiaoliang Dai, Peizhao Zhang, Yanghan Wang, Fei Sun, Yiming Wu, Yuandong Tian, Peter Vajda, et al.

    Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR) ยท 2019

    BibTeX
    @inproceedings{wu2019fbnet,
      title={{FBNet}: Hardware-Aware Efficient ConvNet Design via Differentiable Neural Architecture Search},
      author={Wu, Bichen and Dai, Xiaoliang and Zhang, Peizhao and Wang, Yanghan and Sun, Fei and Wu, Yiming and Tian, Yuandong and Vajda, Peter and Jia, Yangqing and Keutzer, Kurt},
      booktitle={Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR)},
      year={2019}
    }

    Conference paper

  33. MnasNet: Platform-Aware Neural Architecture Search for Mobile

    Mingxing Tan, Bo Chen, Ruoming Pang, Vijay Vasudevan, Mark Sandler, Andrew Howard, Quoc V. Le

    IEEE/CVF Conference on Computer Vision and Pattern Recognition, pp. 2820-2828 ยท 2019

    BibTeX
    @inproceedings{tan2019mnasnet,
      title={{MnasNet}: Platform-Aware Neural Architecture Search for Mobile},
      author={Tan, Mingxing and Chen, Bo and Pang, Ruoming and Vasudevan, Vijay and Sandler, Mark and Howard, Andrew and Le, Quoc V.},
      booktitle={IEEE/CVF Conference on Computer Vision and Pattern Recognition},
      pages={2820--2828},
      year={2019}
    }

    Conference paper

  34. Once-for-All: Train One Network and Specialize It for Efficient Deployment

    Han Cai, Chuang Gan, Tianzhe Wang, Zhekai Zhang, Song Han

    Proceedings of ICLR ยท 2020

    BibTeX
    @inproceedings{cai2020ofa,
      author    = {Cai, Han and Gan, Chuang and Wang, Tianzhe and Zhang, Zhekai and Han, Song},
      title     = {Once-for-All: Train One Network and Specialize It for Efficient Deployment},
      booktitle = {Proceedings of ICLR},
      year      = {2020}
    }

    Conference paper

  35. EfficientNet: Rethinking Model Scaling for Convolutional Neural Networks

    Mingxing Tan, Quoc V. Le

    Proceedings of the International Conference on Machine Learning (ICML) ยท 2019

    BibTeX
    @inproceedings{tan2019efficientnet,
      title={{EfficientNet}: Rethinking Model Scaling for Convolutional Neural Networks},
      author={Tan, Mingxing and Le, Quoc V.},
      booktitle={Proceedings of the International Conference on Machine Learning (ICML)},
      year={2019}
    }

    Conference paper

  36. Neural Architecture Search without Training

    Joseph Mellor, Jack Turner, Amos Sherrell, Elliot Sherrell

    Proceedings of the International Conference on Machine Learning (ICML) ยท 2021

    BibTeX
    @inproceedings{mellor2021naswot,
      title={Neural Architecture Search without Training},
      author={Mellor, Joseph and Turner, Jack and Sherrell, Amos and Sherrell, Elliot},
      booktitle={Proceedings of the International Conference on Machine Learning (ICML)},
      year={2021}
    }

    Conference paper

  37. Pruning Neural Networks without Any Data by Iteratively Conserving Synaptic Flow

    Hidenori Tanaka, Daniel Kunin, Daniel L. K. Yamins, Surya Ganguli

    Advances in NeurIPS ยท 2020

    BibTeX
    @article{tanaka2020synflow,
      author    = {Tanaka, Hidenori and Kunin, Daniel and Yamins, Daniel L. K. and Ganguli, Surya},
      title     = {Pruning Neural Networks without Any Data by Iteratively Conserving Synaptic Flow},
      journal   = {Advances in NeurIPS},
      year      = {2020}
    }

    Journal article

  38. LayerNAS: Neural Architecture Search in Polynomial Complexity

    Zhecheng He, others

    arXiv preprint arXiv:2304.11517 ยท 2024

    BibTeX
    @article{he2024layernas,
      title={{LayerNAS}: Neural Architecture Search in Polynomial Complexity},
      author={He, Zhecheng and others},
      journal={arXiv preprint arXiv:2304.11517},
      year={2024}
    }

    Journal article

  39. Random Search and Reproducibility for Neural Architecture Search

    Liam Li, Ameet Talwalkar

    Proceedings of UAI ยท 2020

    BibTeX
    @article{li2020random,
      author    = {Li, Liam and Talwalkar, Ameet},
      title     = {Random Search and Reproducibility for Neural Architecture Search},
      journal   = {Proceedings of UAI},
      year      = {2020}
    }

    Journal article

  40. Evaluating the Search Phase of Neural Architecture Search

    Kaicheng Yu, Christian Sciuto, Martin Jaggi, Claudiu Muber, Mathieu Salzmann

    Proceedings of ICLR ยท 2020

    BibTeX
    @article{yu2020evaluating,
      author    = {Yu, Kaicheng and Sciuto, Christian and Jaggi, Martin and Muber, Claudiu and Salzmann, Mathieu},
      title     = {Evaluating the Search Phase of Neural Architecture Search},
      journal   = {Proceedings of ICLR},
      year      = {2020}
    }

    Journal article

  41. NAS-Bench-101: Towards Reproducible Neural Architecture Search

    Chris Ying, Aaron Klein, Eric Christiansen, Esteban Real, Kevin Murphy, Frank Hutter

    International Conference on Machine Learning, pp. 7105-7114 ยท 2019

    BibTeX
    @inproceedings{ying2019nasbench101,
      title={{NAS-Bench-101}: Towards Reproducible Neural Architecture Search},
      author={Ying, Chris and Klein, Aaron and Christiansen, Eric and Real, Esteban and Murphy, Kevin and Hutter, Frank},
      booktitle={International Conference on Machine Learning},
      pages={7105--7114},
      year={2019}
    }

    Conference paper

  42. NAS-Bench-201: Extending the Scope of Reproducible Neural Architecture Search

    Xuanyi Dong, Yi Yang

    International Conference on Learning Representations ยท 2020

    BibTeX
    @inproceedings{dong2020nasbench201,
      title={{NAS-Bench-201}: Extending the Scope of Reproducible Neural Architecture Search},
      author={Dong, Xuanyi and Yang, Yi},
      booktitle={International Conference on Learning Representations},
      year={2020}
    }

    Conference paper

  43. Scalable Diffusion Models with Transformers

    William Peebles, Saining Xie

    International Conference on Computer Vision ยท 2023

    BibTeX
    @article{peebles2023dit,
      title={Scalable Diffusion Models with Transformers},
      author={Peebles, William and Xie, Saining},
      journal={International Conference on Computer Vision},
      year={2023}
    }

    Journal article

  44. Overcoming Catastrophic Forgetting in Neural Networks

    James Kirkpatrick, Razvan Pascanu, Neil Rabinowitz, Joel Veness, Guillaume Desjardins, Andrei A Rusu, Kieran Milan, John Quan, et al.

    Proceedings of the National Academy of Sciences, vol. 114, no. 13, pp. 3521-3526 ยท 2017

    BibTeX
    @article{kirkpatrick2017ewc,
      title={Overcoming Catastrophic Forgetting in Neural Networks},
      author={Kirkpatrick, James and Pascanu, Razvan and Rabinowitz, Neil and Veness, Joel and Desjardins, Guillaume and Rusu, Andrei A and Milan, Kieran and Quan, John and Ramalho, Tiago and Grabska-Barwinska, Agnieszka and Hassabis, Demis and Clopath, Claudia and Kumaran, Dharshan and Hadsell, Raia},
      journal={Proceedings of the National Academy of Sciences},
      volume={114},
      number={13},
      pages={3521--3526},
      year={2017}
    }

    Journal article

  45. An Image is Worth 16x16 Words: Transformers for Image Recognition at Scale

    Alexey Dosovitskiy, Lucas Beyer, Alexander Kolesnikov, Dirk Weissenborn, Xiaohua Zhai, Thomas Unterthiner, Mostafa Dehghani, Matthias Minderer, et al.

    International Conference on Learning Representations ยท 2021

    BibTeX
    @inproceedings{dosovitskiy2021vit,
      title={An Image is Worth 16x16 Words: Transformers for Image Recognition at Scale},
      author={Dosovitskiy, Alexey and Beyer, Lucas and Kolesnikov, Alexander and Weissenborn, Dirk and Zhai, Xiaohua and Unterthiner, Thomas and Dehghani, Mostafa and Minderer, Matthias and Heigold, Georg and Gelly, Sylvain and Uszkoreit, Jakob and Houlsby, Neil},
      booktitle={International Conference on Learning Representations},
      year={2021}
    }

    Conference paper

  46. Scaling Laws for Neural Language Models

    Jared Kaplan, Sam McCandlish, Tom Henighan, Tom B. Brown, Benjamin Chess, Rewon Child, Scott Gray, Alec Radford, et al.

    arXiv preprint arXiv:2001.08361 ยท 2020

    BibTeX
    @article{kaplan2020scaling,
      title={Scaling Laws for Neural Language Models},
      author={Kaplan, Jared and McCandlish, Sam and Henighan, Tom and Brown, Tom B. and Chess, Benjamin and Child, Rewon and Gray, Scott and Radford, Alec and Wu, Jeffrey and Amodei, Dario},
      journal={arXiv preprint arXiv:2001.08361},
      year={2020}
    }

    Journal article

  47. Progressive Neural Networks

    Andrei A. Rusu, Neil C. Rabinowitz, Guillaume Desjardins, Hubert Sober, Koray Kavukcuoglu, Raia Hadsell

    Advances in Neural Information Processing Systems ยท 2016

    BibTeX
    @inproceedings{rusu2016progressive,
      title={Progressive Neural Networks},
      author={Rusu, Andrei A. and Rabinowitz, Neil C. and Desjardins, Guillaume and Sober, Hubert and Kavukcuoglu, Koray and Hadsell, Raia},
      booktitle={Advances in Neural Information Processing Systems},
      year={2016}
    }

    Conference paper

  48. No Free Lunch Theorems for Optimization

    David H. Wolpert, William G. Macready

    IEEE Transactions on Evolutionary Computation, vol. 1, no. 1, pp. 67-82 ยท 1997

    BibTeX
    @article{wolpert1997nfl,
      title={No Free Lunch Theorems for Optimization},
      author={Wolpert, David H. and Macready, William G.},
      journal={IEEE Transactions on Evolutionary Computation},
      volume={1},
      number={1},
      pages={67--82},
      year={1997}
    }

    Journal article

  49. Speculations Concerning the First Ultraintelligent Machine

    Irving John Good

    Advances in Computers, vol. 6, pp. 31-88 ยท 1965

    BibTeX
    @article{good1965speculations,
      title={Speculations Concerning the First Ultraintelligent Machine},
      author={Good, Irving John},
      journal={Advances in Computers},
      volume={6},
      pages={31--88},
      year={1965}
    }

    Journal article

  50. Evolving Neural Networks through Augmenting Topologies

    Kenneth O. Stanley, Risto Miikkulainen

    Evolutionary Computation, vol. 10, no. 2, pp. 99-127 ยท 2002

    BibTeX
    @article{stanley2002neat,
      title={Evolving Neural Networks through Augmenting Topologies},
      author={Stanley, Kenneth O. and Miikkulainen, Risto},
      journal={Evolutionary Computation},
      volume={10},
      number={2},
      pages={99--127},
      year={2002}
    }

    Journal article

  51. Learning Transferable Architectures for Scalable Image Recognition

    Barret Zoph, Vijay Vasudevan, Jonathon Shlens, Quoc V. Le

    Proceedings of CVPR, pp. 8697-8710 ยท 2018

    BibTeX
    @inproceedings{zoph2018learning,
      author    = {Zoph, Barret and Vasudevan, Vijay and Shlens, Jonathon and Le, Quoc V.},
      title     = {Learning Transferable Architectures for Scalable Image Recognition},
      booktitle = {Proceedings of CVPR},
      pages     = {8697--8710},
      year      = {2018}
    }

    Conference paper

  52. AutoGAN: Neural Architecture Search for Generative Adversarial Networks

    Xinyu Gong, Shiyu Chang, Yifan Jiang, Zhangyang Wang

    Proceedings of the IEEE/CVF International Conference on Computer Vision (ICCV) ยท 2019

    BibTeX
    @inproceedings{gong2019autogan,
      title={{AutoGAN}: Neural Architecture Search for Generative Adversarial Networks},
      author={Gong, Xinyu and Chang, Shiyu and Jiang, Yifan and Wang, Zhangyang},
      booktitle={Proceedings of the IEEE/CVF International Conference on Computer Vision (ICCV)},
      year={2019}
    }

    Conference paper

  53. Neural Architecture Search: Insights from 1000 Papers

    Colin White, Mahmoud Safari, Rhea Suber, Debadeepta Dey, Arber Frank

    arXiv preprint arXiv:2301.08727 ยท 2023

    BibTeX
    @article{white2023nas_survey,
      title={Neural Architecture Search: Insights from 1000 Papers},
      author={White, Colin and Safari, Mahmoud and Suber, Rhea and Dey, Debadeepta and Frank, Arber},
      journal={arXiv preprint arXiv:2301.08727},
      year={2023}
    }

    Journal article

  54. DiffusionNAG: Predictor-Guided Neural Architecture Generation with Diffusion Models

    Sohyun An Li, Hayeon Lee, Jaehyeong Ko, Jinwoo Lee

    arXiv preprint arXiv:2305.16943 ยท 2024

    BibTeX
    @article{li2024diffusionnag,
      title={{DiffusionNAG}: Predictor-Guided Neural Architecture Generation with Diffusion Models},
      author={Li, Sohyun An and Lee, Hayeon and Ko, Jaehyeong and Lee, Jinwoo},
      journal={arXiv preprint arXiv:2305.16943},
      year={2024}
    }

    Journal article

  55. GPT-NAS: Evolutionary Neural Architecture Search with the Generative Pre-Trained Model

    Haihang Chen, Tao Zhang, Zhichao Lu

    arXiv preprint arXiv:2305.08298 ยท 2024

    BibTeX
    @article{chen2024gptnas,
      title={{GPT-NAS}: Evolutionary Neural Architecture Search with the Generative Pre-Trained Model},
      author={Chen, Haihang and Zhang, Tao and Lu, Zhichao},
      journal={arXiv preprint arXiv:2305.08298},
      year={2024}
    }

    Journal article

  56. Mamba: Linear-Time Sequence Modeling with Selective State Spaces

    Albert Gu, Tri Dao

    arXiv preprint arXiv:2312.00752 ยท 2024

    BibTeX
    @article{gu2024mamba,
      title={Mamba: Linear-Time Sequence Modeling with Selective State Spaces},
      author={Gu, Albert and Dao, Tri},
      journal={arXiv preprint arXiv:2312.00752},
      year={2024}
    }

    Journal article

  57. The Basics of Brain Development

    Joan Stiles, Terry L. Jernigan

    Neuropsychology Review, vol. 20, no. 4, pp. 327-348 ยท 2010

    BibTeX
    @article{stiles2010basics,
      author    = {Stiles, Joan and Jernigan, Terry L.},
      title     = {The Basics of Brain Development},
      journal   = {Neuropsychology Review},
      volume    = {20},
      number    = {4},
      pages     = {327--348},
      year      = {2010}
    }

    Journal article

  58. Morphometric Study of Human Cerebral Cortex Development

    Peter R. Huttenlocher

    Neuropsychologia, vol. 28, no. 6, pp. 517-527 ยท 1990

    BibTeX
    @article{huttenlocher1990morphometric,
      author    = {Huttenlocher, Peter R.},
      title     = {Morphometric Study of Human Cerebral Cortex Development},
      journal   = {Neuropsychologia},
      volume    = {28},
      number    = {6},
      pages     = {517--527},
      year      = {1990}
    }

    Journal article

  59. Biological Foundations of Language

    Eric H. Lenneberg

    Wiley ยท 1967

    BibTeX
    @article{lenneberg1967biological,
      author    = {Lenneberg, Eric H.},
      title     = {Biological Foundations of Language},
      publisher = {Wiley},
      year      = {1967}
    }

    Journal article

  60. Brain Charts for the Human Lifespan

    Richard A. I. Bethlehem, others

    Nature, vol. 604, pp. 525-533 ยท 2022

    BibTeX
    @article{bethlehem2022brain,
      author    = {Bethlehem, Richard A. I. and others},
      title     = {Brain Charts for the Human Lifespan},
      journal   = {Nature},
      volume    = {604},
      pages     = {525--533},
      year      = {2022}
    }

    Journal article

  61. The Lottery Ticket Hypothesis: Finding Sparse, Trainable Neural Networks

    Jonathan Frankle, Michael Carbin

    International Conference on Learning Representations (ICLR) ยท 2019

    BibTeX
    @inproceedings{frankle2019lottery,
      title={The Lottery Ticket Hypothesis: Finding Sparse, Trainable Neural Networks},
      author={Frankle, Jonathan and Carbin, Michael},
      booktitle={International Conference on Learning Representations (ICLR)},
      year={2019}
    }

    Conference paper

  62. Net2Net: Accelerating Learning via Knowledge Transfer

    Tianqi Chen, Ian Goodfellow, Jonathon Shlens

    International Conference on Learning Representations ยท 2016

    BibTeX
    @inproceedings{chen2016net2net,
      title={{Net2Net}: Accelerating Learning via Knowledge Transfer},
      author={Chen, Tianqi and Goodfellow, Ian and Shlens, Jonathon},
      booktitle={International Conference on Learning Representations},
      year={2016}
    }

    Conference paper

  63. Progressive Growing of GANs for Improved Quality, Stability, and Variation

    Tero Karras, Timo Aila, Samuli Laine, Jaakko Lehtinen

    International Conference on Learning Representations ยท 2018

    BibTeX
    @inproceedings{karras2018progressive,
      title={Progressive Growing of {GAN}s for Improved Quality, Stability, and Variation},
      author={Karras, Tero and Aila, Timo and Laine, Samuli and Lehtinen, Jaakko},
      booktitle={International Conference on Learning Representations},
      year={2018}
    }

    Conference paper

  64. Neurogenesis in the Adult Human Hippocampus

    Peter S. Eriksson, Ekaterina Perfilieva, Thomas Bjork-Eriksson, Ann-Marie Alborn, Clas Nordborg, Daniel A. Peterson, Fred H. Gage

    Nature Medicine, vol. 4, no. 11, pp. 1313-1317 ยท 1998

    BibTeX
    @article{eriksson1998neurogenesis,
      author    = {Eriksson, Peter S. and Perfilieva, Ekaterina and Bj{\"o}rk-Eriksson, Thomas and Alborn, Ann-Marie and Nordborg, Clas and Peterson, Daniel A. and Gage, Fred H.},
      title     = {Neurogenesis in the Adult Human Hippocampus},
      journal   = {Nature Medicine},
      volume    = {4},
      number    = {11},
      pages     = {1313--1317},
      year      = {1998}
    }

    Journal article

  65. Appraising the Brain's Energy Budget

    Marcus E. Raichle, Debra A. Gusnard

    Proceedings of the National Academy of Sciences, vol. 99, no. 16, pp. 10237-10239 ยท 2002

    BibTeX
    @article{raichle2002appraising,
      author    = {Raichle, Marcus E. and Gusnard, Debra A.},
      title     = {Appraising the Brain's Energy Budget},
      journal   = {Proceedings of the National Academy of Sciences},
      volume    = {99},
      number    = {16},
      pages     = {10237--10239},
      year      = {2002}
    }

    Journal article

  66. Wiring Optimization in Cortical Circuits

    Dmitri B. Chklovskii, Thomas Schikorski, Charles F. Stevens

    Neuron, vol. 34, no. 3, pp. 341-347 ยท 2002

    BibTeX
    @article{chklovskii2002wiring,
      author    = {Chklovskii, Dmitri B. and Schikorski, Thomas and Stevens, Charles F.},
      title     = {Wiring Optimization in Cortical Circuits},
      journal   = {Neuron},
      volume    = {34},
      number    = {3},
      pages     = {341--347},
      year      = {2002}
    }

    Journal article

  67. A mathematical theory of communication

    Claude Elwood Shannon

    The Bell System Technical Journal, vol. 27, no. 3, pp. 379-423 ยท 1948

    BibTeX
    @article{shannon1948mathematical,
      title={A mathematical theory of communication},
      author={Shannon, Claude Elwood},
      journal={The Bell System Technical Journal},
      volume={27},
      number={3},
      pages={379--423},
      year={1948},
      publisher={Nokia Bell Labs}
    }

    Journal article

  68. Information Theory and Neural Coding

    Alexander Borst, Frederic E. Theunissen

    Nature Neuroscience, vol. 2, no. 11, pp. 947-957 ยท 1999

    BibTeX
    @article{borst1999information,
      title={Information Theory and Neural Coding},
      author={Borst, Alexander and Theunissen, Fr{\'e}d{\'e}ric E.},
      journal={Nature Neuroscience},
      volume={2},
      number={11},
      pages={947--957},
      year={1999}
    }

    Journal article

  69. The User Illusion: Cutting Consciousness Down to Size

    Tor Norretranders

    Viking ยท 1998

    BibTeX
    @book{norretranders1998user,
      author    = {N{\o}rretranders, Tor},
      title     = {The User Illusion: Cutting Consciousness Down to Size},
      publisher = {Viking},
      year      = {1998}
    }

    Book

  70. Opening the Black Box of Deep Neural Networks via Information

    Ravid Shwartz-Ziv, Naftali Tishby

    arXiv preprint arXiv:1703.00810 ยท 2017

    BibTeX
    @article{shwartz2017opening,
      title={Opening the Black Box of Deep Neural Networks via Information},
      author={Shwartz-Ziv, Ravid and Tishby, Naftali},
      journal={arXiv preprint arXiv:1703.00810},
      year={2017}
    }

    Journal article

  71. Sleep Function and Synaptic Homeostasis

    Giulio Tononi, Chiara Cirelli

    Sleep Medicine Reviews, vol. 10, no. 1, pp. 49-62 ยท 2006

    BibTeX
    @article{tononi2006sleep,
      title={Sleep Function and Synaptic Homeostasis},
      author={Tononi, Giulio and Cirelli, Chiara},
      journal={Sleep Medicine Reviews},
      volume={10},
      number={1},
      pages={49--62},
      year={2006}
    }

    Journal article

  72. Why We Sleep: Unlocking the Power of Sleep and Dreams

    Matthew Walker

    Scribner ยท 2017

    BibTeX
    @book{walker2017sleep,
      title={Why We Sleep: Unlocking the Power of Sleep and Dreams},
      author={Walker, Matthew},
      publisher={Scribner},
      address={New York},
      year={2017}
    }

    Book

  73. NeuroDream: A Sleep-Inspired Framework for Offline Memory Consolidation in Neural Networks

    Anonymous Shetty, others

    arXiv preprint ยท 2024

    BibTeX
    @article{shetty2024neurodream,
      title={{NeuroDream}: A Sleep-Inspired Framework for Offline Memory Consolidation in Neural Networks},
      author={Shetty, Anonymous and others},
      journal={arXiv preprint},
      year={2024}
    }

    Journal article

  74. Hierarchical Representations for Efficient Architecture Search

    Hanxiao Liu, Karen Simonyan, Oriol Vinyals, Chrisantha Fernando, Koray Kavukcuoglu

    Proceedings of ICLR ยท 2018

    BibTeX
    @inproceedings{liu2018hierarchical,
      author    = {Liu, Hanxiao and Simonyan, Karen and Vinyals, Oriol and Fernando, Chrisantha and Kavukcuoglu, Koray},
      title     = {Hierarchical Representations for Efficient Architecture Search},
      booktitle = {Proceedings of ICLR},
      year      = {2018}
    }

    Conference paper

  75. U-Net: Convolutional Networks for Biomedical Image Segmentation

    Olaf Ronneberger, Philipp Fischer, Thomas Brox

    Proceedings of MICCAI, pp. 234-241 ยท 2015

    BibTeX
    @article{ronneberger2015unet,
      author    = {Ronneberger, Olaf and Fischer, Philipp and Brox, Thomas},
      title     = {{U-Net}: Convolutional Networks for Biomedical Image Segmentation},
      journal   = {Proceedings of MICCAI},
      pages     = {234--241},
      year      = {2015}
    }

    Journal article

  76. Attention is all you need

    Ashish Vaswani, Noam Shazeer, Niki Parmar, Jakob Uszkoreit, Llion Jones, Aidan N Gomez, Lukasz Kaiser, Illia Polosukhin

    Advances in neural information processing systems, pp. 5998-6008 ยท 2017

    BibTeX
    @inproceedings{vaswani2017attention,
    title={Attention is all you need},
    author={Vaswani, Ashish and Shazeer, Noam and Parmar, Niki and Uszkoreit, Jakob and Jones, Llion and Gomez, Aidan N and Kaiser, {\L}ukasz and Polosukhin, Illia},
    booktitle={Advances in neural information processing systems},
    pages={5998--6008},
    year={2017}
    }

    Conference paper

  77. Once-for-All: Train One Network and Specialize It for Efficient Deployment

    Han Cai, Chuang Gan, Tianzhe Wang, Zhekai Zhang, Song Han

    Proceedings of ICLR ยท 2020

    BibTeX
    @article{cai2020once,
      author    = {Cai, Han and Gan, Chuang and Wang, Tianzhe and Zhang, Zhekai and Han, Song},
      title     = {Once-for-All: Train One Network and Specialize It for Efficient Deployment},
      journal   = {Proceedings of ICLR},
      year      = {2020}
    }

    Journal article

  78. One-Shot Neural Architecture Search: Maximising Diversity to Overcome Shrinking Spaces

    Zhichao Lu, others

    IEEE Transactions on Pattern Analysis and Machine Intelligence ยท 2021

    BibTeX
    @article{lu2021one,
      author    = {Lu, Zhichao and others},
      title     = {One-Shot Neural Architecture Search: Maximising Diversity to Overcome Shrinking Spaces},
      journal   = {IEEE Transactions on Pattern Analysis and Machine Intelligence},
      year      = {2021}
    }

    Journal article

  79. Long Short-Term Memory

    Sepp Hochreiter, Jurgen Schmidhuber

    Neural Computation, vol. 9, no. 8, pp. 1735-1780 ยท 1997

    BibTeX
    @article{hochreiter1997lstm,
      title={Long Short-Term Memory},
      author={Hochreiter, Sepp and Schmidhuber, J{\"u}rgen},
      journal={Neural Computation},
      volume={9},
      number={8},
      pages={1735--1780},
      year={1997}
    }

    Journal article

  80. Searching for MobileNetV3

    Andrew Howard, Mark Sandler, Grace Chu, Liang-Chieh Chen, Bo Chen, Mingxing Tan, Weijun Wang, Yukun Zhu, et al.

    arXiv preprint arXiv:1905.02244 ยท 2019

    BibTeX
    @article{howard2019mobilenetv3,
      title={Searching for {MobileNetV3}},
      author={Howard, Andrew and Sandler, Mark and Chu, Grace and Chen, Liang-Chieh and Chen, Bo and Tan, Mingxing and Wang, Weijun and Zhu, Yukun and Pang, Ruoming and Vasudevan, Vijay and Le, Quoc V. and Adam, Hartwig},
      journal={arXiv preprint arXiv:1905.02244},
      year={2019}
    }

    Journal article

  81. Flexiffusion: Training-Free Neural Architecture Search for Efficient Diffusion Models

    Anonymous

    arXiv preprint ยท 2024

    BibTeX
    @article{flexiffusion2024,
      title={Flexiffusion: Training-Free Neural Architecture Search for Efficient Diffusion Models},
      author={Anonymous},
      journal={arXiv preprint},
      year={2024}
    }

    Journal article

  82. Progressive Neural Networks

    Andrei A Rusu, Neil C Rabinowitz, Guillaume Desjardins, Hubert Sober, Koray Kavukcuoglu, Raia Hadsell

    arXiv preprint arXiv:1606.04671 ยท 2016

    BibTeX
    @inproceedings{rusu2016pnn,
      title={Progressive Neural Networks},
      author={Rusu, Andrei A and Rabinowitz, Neil C and Desjardins, Guillaume and Sober, Hubert and Kavukcuoglu, Koray and Hadsell, Raia},
      booktitle={arXiv preprint arXiv:1606.04671},
      year={2016}
    }

    Conference paper

  83. Primer: Searching for Efficient Transformers for Language Modeling

    David R. So, Wojciech Manke, Hanxiao Liu, Zihang Dai, Noam Shazeer, Quoc V. Le

    Advances in Neural Information Processing Systems ยท 2021

    BibTeX
    @inproceedings{so2021primer,
      title={Primer: Searching for Efficient Transformers for Language Modeling},
      author={So, David R. and Ma{\'n}ke, Wojciech and Liu, Hanxiao and Dai, Zihang and Shazeer, Noam and Le, Quoc V.},
      booktitle={Advances in Neural Information Processing Systems},
      year={2021}
    }

    Conference paper

  84. NAS Evaluation is Frustratingly Hard

    Antoine Yang, Pedro M. Esperanca, Fabio M. Carlucci

    International Conference on Learning Representations ยท 2020

    BibTeX
    @inproceedings{yang2020nas_evaluation,
      title={{NAS} Evaluation is Frustratingly Hard},
      author={Yang, Antoine and Esperan{\c{c}}a, Pedro M. and Carlucci, Fabio M.},
      booktitle={International Conference on Learning Representations},
      year={2020}
    }

    Conference paper